MCIMX27VOP4A Freescale, MCIMX27VOP4A Datasheet - Page 6

• Manufacturer Part Number: MCIMX27VOP4A
• Manufacturer: Freescale

Specifications of MCIMX27VOP4A

• Lead Free Status / RoHS Status: Compliant

Functional Description and Application Information
6
Block Mnemonic
ESDRAMC
AUDMUX
eMMA_lt
DMAC
GPIO
CSPI
CRM
GPT
FEC
ATA
CSI
EMI
Serial Peripheral
Technology(AT)
Purpose Timer
CMOS Sensor
Direct Memory
Reset Module
Fast Ethernet
Interface (x3)
Block Name
Digital Audio
Configurable
Purpose I/O
Attachment
Multiplexer
Enhanced
Advanced
Controller
Controller
Controller
Clock and
eMMA_lt
Interface
Interface
External
Memory
SDRAM
General
General
Access
Module
Table 2. Digital and Analog Modules (continued)
Interface (EMI)
Reset Control
Connectivity
Connectivity
Connectivity
Functional
Accelerator
Multimedia
Multimedia
Grouping
Peripheral
Peripheral
Clock and
Peripheral
Peripheral
Peripheral
Resource
Functions
Standard
Interface
Interface
Memory
External
Memory
System
i.MX27 and i.MX27L Data Sheet, Rev. 1.6
Timer
H/W
Pins
The ATA block is an AT attachment host interface. It interfaces
with IDE hard disc drives and ATAPI optical disc drives.
The AUDMUX interconnections allow multiple, simultaneous
audio/voice/data flows between the ports in point-to-point or
point-to-multipoint configurations.
The CRM generates clock and reset signals used throughout
the i.MX27/MX27L processors and also for external
peripherals.
The CSI is a logic interface which enables the i.MX27/MX27L
processors to connect directly to external CMOS sensors and
a CCIR656 video source.
The i.MX27/MX27L processors have three CSPI modules.
CSPI is equipped with two data FIFOs and is a master/slave
configurable serial peripheral interface module, allowing the
i.MX27/MX27L processors to interface with both external SPI
master and slave devices.
The DMAC of the i.MX27/MX27L processors provides 16
channels supporting linear memory, 2D memory, FIFO and
end-of-burst enable FIFO transfers to support a wide variety of
DMA operations.
eMMA_lt consists of a PreProcessor and PostProcessor, and
provides video acceleration. The PrP and PP can be used for
generic video pre and post processing such as scaling,
resizing, and color space conversions.
The EMI includes
The ESDRAMC provides interface and control for synchronous
DRAM memories for the system.
The FEC performs the full set of IEEE 802.3/Ethernet
CSMA/CD media access control and channel interface
functions. The FEC supports connection and functionality for
the 10/100 Mbps 802.3 media independent interface (MII). It
requires an external transceiver (PHY) to complete the
interface to the media.
The GPIO provides 32 bits of bidirectional, general purpose
I/O. This peripheral provides dedicated general-purpose pins
that can be configured as either inputs or outputs.
The GPT is a multipurpose module used to measure intervals
or generate periodic output.
• Multi-Master Memory Interface (M3IF)
• Enhanced SDRAM/MDDR memory controller (ESDRAMC)
• PCMCIA memory controller (PCMCIA)
• NAND Flash Controller (NFC)
• Wireless External Interface Module (WEIM)
Brief Description
Freescale Semiconductor
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