CY7C131-55JCT Cypress Semiconductor Corp, CY7C131-55JCT Datasheet
CY7C131-55JCT
Specifications of CY7C131-55JCT
Related parts for CY7C131-55JCT
CY7C131-55JCT Summary of contents
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... INT L Notes 1. CY7C130 and CY7C130A are functionally identical; CY7C131 and CY7C131A are functionally identical. 2. CY7C130/130A/CY7C131/131A (Master): BUSY is open drain output and requires pull-up resistor. CY7C140/CY7C141 (Slave): BUSY is input. 3. Open drain outputs: pull-up resistor required. Cypress Semiconductor Corporation Document #: 38-06002 Rev. *F ...
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... Figure 1. Pin Diagram - DIP (Top View R BUSY 46 R BUSY INT INT 7C130 7C140 I I/O I I/O I I/O I I/O I I/O GND 0R Figure 3. Pin Diagram - PQFP (Top View 5150 I I 1415 CY7C130, CY7C130A CY7C131, CY7C131A 7C131 7C141 I Page [+] Feedback [+] Feedback ...
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... Data Bus Input/Output Interrupt Flag Busy Flag Power Ground 7C130-30 7C130-35 [4] 7C130A-30 [4] 7C131-25 7C131-35 7C131-30 7C141-25 7C140-35 7C140-30 7C141-35 7C141- 190 170 170 CY7C130, CY7C130A CY7C131, CY7C131A Description 7C130-45 7C130-55 7C131-45 7C131-55 7C140-45 7C140-55 7C141-45 7C141- 120 120 110 Page Unit [+] Feedback [+] Feedback ...
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... CC < 0.2V Com’l 125 L > V – 0.2V, CC > V – 0.2V CC < 0.2V, IN [11] and using AC Test Waveforms input levels of GND to 3V. RC CY7C130, CY7C130A CY7C131, CY7C131A Ambient Temperature V CC + ± 10% – + ± 10% – +125 C 5V ± ...
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... Figure 4. AC Test Loads and Waveforms R1 893 5V OUTPUT 347 INCLUDING JIGAND (b) SCOPE ALL INPUT PULSES 3.0V 90% 10% GND 1.40V CY7C130, CY7C130A CY7C131, CY7C131A Max Unit 281 BUSY OR INT 30 pF BUSY Output Load (CY7C130/CY7C131 ONLY) 90% 10% 5ns Page [+] Feedback [+] Feedback ...
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... Document #: 38-06002 Rev. *F [7, 12] [4] 7C131-15 7C131A-15 7C141-15 Min Max [10 less than t and t HZCE LZCE HZOE = part ( Test Loads. Transition is measured ±500 mV from steady state voltage. L CY7C130, CY7C130A CY7C131, CY7C131A 7C130-30 [4] 7C130-25 7C130A-30 7C131-25 7C131-30 7C140-25 Unit 7C140-30 7C141-25 7C141-30 Min Max Min Max ...
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... R/W for Port B is toggled during valid read. Document #: 38-06002 Rev. *F [7, 12] (continued) [4] 7C131-15 7C131A-15 7C141-15 Min Max 15 [17 [17 Note 19 Note [17] 15 [17] 15 [17] 15 CY7C130, CY7C130A CY7C131, CY7C131A 7C130-30 [4] 7C130-25 7C130A-30 7C131-25 7C131-30 7C140-25 Unit 7C140-30 7C141-25 7C141-30 Min Max Min Max ...
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... CE to INTERRUPT Reset Time EINR t Address to INTERRUPT Reset Time INR Document #: 38-06002 Rev. *F [7,12] 7C130-35 7C131-35 7C140-35 7C141-35 Min Max [10 [17 [17 Note 19 Note [17] 25 [17] 25 [17] 25 CY7C130, CY7C130A CY7C131, CY7C131A 7C130-45 7C130-55 7C131-45 7C131-55 7C140-45 7C140-55 Unit 7C141-45 7C141-55 Min Max Min Max ...
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... Switching Waveforms ADDRESS t OHA DATA OUT PREVIOUS DATA VALID LZOE t LZCE DATA OUT Read with BUSY, Master: CY7C130 and CY7C131 ADDRESS R R INR ADDRESS BUSY L DOUT L Notes 20. R/W is HIGH for read cycle. 21. Device is continuously selected and 22. Address valid prior to or coincident with CE transition LOW. ...
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... If the CE LOW transition occurs simultaneously with or after the R/W LOW transition, the outputs remain in the high impedance state. Document #: 38-06002 Rev. *F Either Port SCE PWE t SD DATA VALID HIGH IMPEDANCE SCE PWE t SD DATA VALID t HZWE HIGH IMPEDANCE PWE HZWE CY7C130, CY7C130A CY7C131, CY7C131A [16, 23 [17, 24 LZWE to allow the data I/O pins to enter high impedance Page [+] Feedback [+] Feedback ...
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... ADDRESS MATCH ADDRESS ADDRESS R BUSY R Right Address Valid First ADDRESS MATCH ADDRESS ADDRESS L BUSY L Document #: 38-06002 Rev. *F ADDRESS MATCH BLC BHC ADDRESS MATCH BLC BHC ADDRESS MISMATCH t t BLA BHA ADDRESS MISMATCH t t BLA BHA CY7C130, CY7C130A CY7C131, CY7C131A Page [+] Feedback [+] Feedback ...
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... Switching Waveforms (continued) Write with BUSY (Slave:CY7C140/CY7C141 BUSY Document #: 38-06002 Rev. *F Figure 12. Busy Timing Diagram No PWE t WH CY7C130, CY7C130A CY7C131, CY7C131A Page [+] Feedback [+] Feedback ...
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... SA INT L Left Side Clears INT L ADDR R INT L Document #: 38-06002 Rev. *F Figure 13. Interrupt Timing Diagrams t WC WRITE 3FF EINS t WINS INT t EINR t OINR EINS t WINS EINR CY7C130, CY7C130A CY7C131, CY7C131A t RC READ 3FF t RC READ 3FE INR t OINR Page [+] Feedback [+] Feedback ...
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... OUTPUT LOADING 30.0 25.0 20.0 15.0 10 4. 25C 200 400 600 800 1000 CAPACITANCE (pF) CY7C130, CY7C130A CY7C131, CY7C131A OUTPUT SOURCE CURRENT vs. OUTPUT VOLTAGE 120 100 5. 25C 1.0 2.0 3.0 4.0 OUTPUT VOLTAGE (V) OUTPUT SINK CURRENT vs. OUTPUT VOLTAGE 140 ...
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... N52 52-Pin Pb-Free Plastic Quad Flatpack J69 52-Pin Pb-Free Plastic Leaded Chip Carrier N52 52-Pin Pb-Free Plastic Quad Flatpack Figure 14. 48-Pin (600 Mil) Sidebraze DIP D26 MIL-STD-1835 D-14 Config. C CY7C130, CY7C130A CY7C131, CY7C131A Operating Range Commercial Industrial Commercial Commercial Industrial 51-80044 ** ...
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... Package Diagrams (continued) Figure 15. 52-Pin Pb-Free Plastic Leaded Chip Carrier J69 Document #: 38-06002 Rev. *F CY7C130, CY7C130A CY7C131, CY7C131A 51-85004 *B Page [+] Feedback [+] Feedback ...
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... Package Diagrams (continued) Figure 17. 52-Pin Pb-Free Plastic Quad Flatpack N52 Document #: 38-06002 Rev. *F Figure 16. 48-Pin (600 Mil) Molded DIP P25 CY7C130, CY7C130A CY7C131, CY7C131A 51-85020 *C 51-85042 *A Page [+] Feedback [+] Feedback ...
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... Document History Page Document Title: CY7C130/CY7C130A/CY7C131/CY7C131A Dual-Port Static RAM Document Number: 38-06002 Orig. of Rev. ECN No. Change ** 110169 SZV *A 122255 RBI *B 236751 YDT *C 325936 RUY *D 393153 YIM *E 2623540 VKN/PYRS *F 2897217 RAME Document #: 38-06002 Rev. *F Submission Date 09/29/01 Change from Spec number: 38-00027 to 38-06002 ...
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... All products and company names mentioned in this document may be the trademarks of their respective holders. PSoC Solutions General psoc.cypress.com Low Power/Low Voltage clocks.cypress.com Precision Analog LCD Drive CAN 2.0b image.cypress.com USB Revised March 22, 2010 CY7C130, CY7C130A CY7C131, CY7C131A psoc.cypress.com/solutions psoc.cypress.com/low-power psoc.cypress.com/precision-analog psoc.cypress.com/lcd-drive psoc.cypress.com/can psoc.cypress.com/usb Page [+] Feedback [+] Feedback ...