STK22C48-PF35I Cypress Semiconductor Corp, STK22C48-PF35I Datasheet - Page 9

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STK22C48-PF35I

Manufacturer Part Number
STK22C48-PF35I
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of STK22C48-PF35I

Lead Free Status / RoHS Status
Supplier Unconfirmed
Switching Waveforms
Notes
Document Number: 001-51000 Rev. *A
SRAM Write Cycle
t
t
t
t
t
t
t
t
t
t
9. If WE is Low when CE goes Low, the outputs remain in the high impedance state.
10. HSB must be high during SRAM Write cycles.
11. CE or WE must be greater than V
WC
PWE
SCE
SD
HD
AW
SA
HA
HZWE
LZWE
Parameter
Cypress
[8]
[8,9]
ADDRESS
DATA OUT
ADDRESS
DATA OUT
DATA IN
DATA IN
WE
CE
CE
WE
Parameter
t
t
t
t
t
t
t
t
t
t
AVAV
WLWH,
ELWH,
DVWH,
WHDX,
AVWH,
AVWL,
WHAX,
WLQZ
WHQX
t
t
t
t
t
t
t
ELEH
AVEL
AVEH
EHAX
WLEH
DVEH
EHDX
Alt
IH
during address transitions.
PREVIOUS DATA
t
SA
Figure 8. SRAM Write Cycle 1: WE Controlled
Figure 9. SRAM Write Cycle 2: CE Controlled
t
SA
Write Cycle Time
Write Pulse Width
Chip Enable To End of Write
Data Setup to End of Write
Data Hold After End of Write
Address Setup to End of Write
Address Setup to Start of Write
Address Hold After End of Write
Write Enable to Output Disable
Output Active After End of Write
Description
HIGH IMPEDANCE
t
t
AW
PWE
t
AW
t
HZWE
t
t
t
SCE
WC
SCE
t
WC
t
t
SD
HIGH IMPEDANCE
PWE
DATA VALID
DATA VALID
t
SD
Min
[10, 11]
[10, 11]
25
20
20
10
20
t
0
0
0
5
HA
t
t
t
HD
25 ns
HD
HA
Max
10
t
LZWE
Min
45
30
30
15
30
0
0
0
5
45 ns
STK22C48
Max
14
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Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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