STK12C68-5C45M Cypress Semiconductor Corp, STK12C68-5C45M Datasheet - Page 8

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STK12C68-5C45M

Manufacturer Part Number
STK12C68-5C45M
Description
Manufacturer
Cypress Semiconductor Corp
Type
NVSRAMr
Datasheet

Specifications of STK12C68-5C45M

Word Size
8b
Organization
8Kx8
Density
64Kb
Interface Type
Parallel
Access Time (max)
45ns
Operating Supply Voltage (typ)
5V
Package Type
CDIP
Operating Temperature Classification
Military
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
Operating Temp Range
-55C to 125C
Pin Count
28
Mounting
Through Hole
Supply Current
80mA
Lead Free Status / RoHS Status
Not Compliant

Available stocks

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Quantity
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Part Number:
STK12C68-5C45M
Quantity:
58
STK12C68-M
EEPROM
unlimited number of times.
AUTOMATIC RECALL
During power up, or after any low power condition
(V
voltage of V
be initiated. After the initiation of this automatic
CALL
CALL
again rises above V
If the STK12C68-M is in a WRITE state at the end of
power-up RECALL , the SRAM data will be corrupted.
To help avoid this situation, a 10K Ohm resistor should
be connected between W and system V
HARDWARE PROTECT
The STK12C68-M offers hardware protection against
inadvertent STORE operation
conditions. When V
initiated
HSB OPERATION
The Hardware Store Busy pin (HSB) is an open drain
circuit acting as both input and output to perform two
different functions. When driven low by the internal
chip circuitry it indicates that a
ated via any means) is in progress within the chip.
When driven low by external circuitry for longer than
t
operation after t
READ
HSB is driven low (either by internal or external cir-
cuitry) will be allowed to complete before the
operation is performed, in the following manner. After
HSB goes low, the part will continue normal
operations for t
any address or control signal will terminate
operation and cause the
that if an
forced low, the write will not occur and the
operation will begin immediately.
Hardware-Store-Busy (HSB) is a high speed, low drive
capability bi-directional control line. In order to allow a
bank of STK12C68-Ms to perform synchronized
functions, the HSB pin from a number of chips may be
ASSERT
CAP
, if V
and
operation will be performed whenever V
< V
, the chip will conditionally initiate a
cells. The nonvolatile data can be recalled an
STORE
SRAM
CAP
WRITE
SWITCH
SWITCH
falls below V
DELAY
write is attempted after HSB has been
DELAY
operations will be inhibited.
operations that are in progress when
), when V
, a
SWITCH
. During t
CAP
RECALL
.
STORE
< V
SWITCH
.
CAP
cycle will automatically
STORE
SWITCH,
DELAY
to commence. Note
exceeds the sense
during low voltage
, then another
, a transition on
operation (initi-
all externally
CC
.
STORE
STORE
STORE
STORE
SRAM
SRAM
CAP
RE-
RE-
4-60
connected together. Each chip contains a small inter-
nal current source to pull HSB
driven low. To decrease the sensitivity of this signal to
noise generated on the PC board, it may optionally be
pulled to V
such that the combined load of the resistor and all
parallel chip connections does not exceed I
V
V
If HSB is to be connected to external circuits other than
other STK12C68-Ms, an external pull-up resistor should
be used.
During any
initiated, the STK12C68-M will continue to drive the
HSB pin low, releasing it only when the
complete. Upon completion of a
part will be disabled until HSB actually goes
AUTOMATIC STORE OPERATION
During normal operation, the STK12C68-M will draw
current from V
to the V
chip to perform a single
up, when the voltage on the V
V
V
Figure 1 shows the proper connection of capacitors for
automatic store operation. The charge storage capaci-
tor should have a capacity of at least 100 F ( 20%) at
6V. Each STK12C68-M must have its own 100 F
capacitor.
quality, high frequency bypass capacitor of 0.1 F
connected between V
traces that are as short as possible.
If the AutoStore ™ function is not required, then V
should be tied directly to the power supply and V
should be tied to ground. In this mode,
tions may be triggered through software control or the
HSB pin. In either event, V
have a proper bypass capacitor connected to it.
In order to prevent unneeded
matic
driving HSB
OL
CAP
SWITCH
CAP
. Do not connect this or any other pull-up to the
node.
pin from V
STOREs
CAP
, the part will automatically disconnect the
CCX
STORE
pin. This stored charge will be used by the
Each STK12C68-M must have a high
LOW
CCX
as well as those initiated by externally
via an external resistor with a value
CCX
will be ignored unless at least one
to charge up a capacitor connected
operation, regardless of how it was
and initiate a
CAP
STORE
and V
CAP
STORE
HIGH
operation. After power
CAP
STORE
(Pin 1) must always
SS
when it is not being
STORE
, using leads and
operations, auto-
pin drops below
STORE
operation, the
operation.
HSB_OL
STORE
HIGH
opera-
CCX
CAP
.
at
is

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