CYM9272APMX-50CT Cypress Semiconductor Corp, CYM9272APMX-50CT Datasheet

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CYM9272APMX-50CT

Manufacturer Part Number
CYM9272APMX-50CT
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CYM9272APMX-50CT

Lead Free Status / RoHS Status
Compliant
72A
Features
Functional Description
The CYM9270, CYM9271B, CYM9272A, and the CYM9273
are high-performance synchronous memory modules orga-
nized as 64K(9270), 128K(9271B), 256K(9272A), 512K(9273)
by 36 bits. These modules are constructed using either 128K
x 18 SRAMs (9270, 9271B, 9272A) or 256K x 18 SRAMs
Cypress Semiconductor Corporation
Document #: 38-05135 Rev. **
Logic Block Diagram - CYM9270
• Operates at 50 MHz
• Uses 64K x 18 / 128K x 18 or 256K x 18 high-performance
• 144-Position Angled DIMM from Berg p/n 61178
• 3.3V inputs/data outputs
synchronous SRAMs
64Kx36
A[15:0]
WE
BW[0:3]
ADSP
OE
CLK[0:1]
CS
PD
GND
1
PD
NC
0
Bank0
3901 North First Street
OE
CS
(9273) in plastic surface mount packages on an epoxy lami-
nate board with pins. The modules are designed to be incor-
porated into large memory arrays.
The modules are configured as single banks or multiple banks
depending on the SRAM used to make the module. Separate
clock are provided for each of the banks. Separate clocks are
provided for each of the SRAMs.
Multiple ground pins and on-board decoupling capacitors en-
sure high performance with maximum noise immunity.
All components on the cache modules are surface mounted on
a multi-layer epoxy laminate (FR-4) substrate. The contact
pins are plated with 150 micro-inches of nickel covered by 30
micro-inches of gold flash.
BWE
WEH
A
CS
WEL
SGW
OE
ADSC
15:0
(2) 128K x 18 SRAMs
Bank 0
128K x 36 SRAM Module
256K x 36 SRAM Module
512K x 36 SRAM Module
San Jose
64K x 36 SRAM Module
DQ[0:1]
D[0:15]
CLK
CLK[0:1]
CA 95134
Revised March 27, 2002
CYM9271B
CYM9272A
D[0:31]
DQ[0:3]
CYM9270
CYM9273
408-943-2600

Related parts for CYM9272APMX-50CT

CYM9272APMX-50CT Summary of contents

Page 1

... GND NC 64Kx36 Cypress Semiconductor Corporation Document #: 38-05135 Rev. ** (9273) in plastic surface mount packages on an epoxy lami- nate board with pins. The modules are designed to be incor- porated into large memory arrays. The modules are configured as single banks or multiple banks depending on the SRAM used to make the module. Separate clock are provided for each of the banks ...

Page 2

Logic Block Diagram - CYM9271B/CYM9272A A[16:0] WE OE[0:1] CS[0:1] BW[0:3] ADSP CLK[0: Bank0 NC GND 128Kx36 Bank0 and Bank1 GND GND 256KX36 Document #: 38-05135 Rev. ** (2) 128K x 18 SRAMs A 16:0 SGW OE0 ...

Page 3

Logic Block Diagram - CYM9273 A[17:0] WE OE[0:1] CS[0:1] BW[0:3] ADSP CLK[0: Bank0 and 1 512KX36 NC NC Document #: 38-05135 Rev. ** (2) 256K x 18 SRAMs A 17:0 SGW OE0 D[0:15] OE CS[0] CS ...

Page 4

Pin Configuration Document #: 38-05135 Rev. ** Dual Read-Out SIMM (DIMM) Top View 1 2 GND GND CC3 ...

Page 5

... Output Enables for each of the banks Byte writes Global Write Chip Select for the two banks Presence Detect output pins Data lines from processor Data Parity lines from processor Clock lines to the module. Signal not connected on module Reserved CYM9271B CYM9272A CYM9273 ...

Page 6

Maximum Ratings (Above which the useful life may be impaired. For user guide- lines, not tested.) Storage Temperature ................................. –55°C to +125°C Ambient Temperature with Power Applied ........................................ –0°C to +70°C 3.3V Supply Voltage to Ground Potential ..... –0.5V to ...

Page 7

AC Test Loads and Waveforms OUTPUT = 50 Ω 1.5V L (a) Switching Characteristics Over the Operating Range Parameter Description t Clock Cycle Time CYC t Clock HIGH CH t Clock LOW CL t Address Set-Up ...

Page 8

Switching Waveforms [5] Single Read t CH CLK CS ADDRESS ADSP [6] WH, WL DATA OUT Single Write Timing CLK CS ADDRESS ADSP t WH, WL DATA IN DATA OUT t EOZ OE Notes LOW throughout this ...

Page 9

Switching Waveforms (continued) Output (Controlled by OE) DATA OUT OE Output Timing (Controlled by CS) CLK t ADS ADSP t CSS CS DATA OUT Output Timing (Controlled by WH/ WL) CLK t ADS ADSP t WES WH, WL DATA OUT ...

Page 10

... Document #: 38-05135 Rev. ** © Cypress Semiconductor Corporation, 2002. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user ...

Page 11

... Document Title: CYM9270, CYM9271B, CYM9272A, CYM9273 64K/128K/256K/512K x 36 SRAM Module Document Number: 38-05135 Issue REV. ECN NO. Date ** 114557 3/28/02 Document #: 38-05135 Rev. ** Orig. of Change Description of Change DSG Change from Spec number: 38-M-00083 to 38-05135 CYM9271B CYM9272A CYM9273 Page ...

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