AD9952YSV Analog Devices Inc, AD9952YSV Datasheet - Page 14

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AD9952YSV

Manufacturer Part Number
AD9952YSV
Description
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9952YSV

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AD9952
Table 4. Clock Input Modes of Operation
CFR1 [4]
Low
Low
Low
Low
High
DAC Output
The AD9952 incorporates an integrated 14-bit current output
DAC. Unlike most DACs, this output is referenced to AVDD,
not AGND.
Two complementary outputs provide a combined full-scale
output current (I
common-mode noise that might be present at the DAC output,
offering the advantage of an increased signal-to-noise ratio. The
full-scale current is controlled by an external resistor (R
connected between the DAC_R
(AGND_DAC). The full-scale current is proportional to the
resistor value as follows:
The maximum full-scale output current of the combined DAC
outputs is 15 mA, but limiting the output to 10 mA provides the
best spurious-free dynamic range (SFDR) performance. The DAC
output compliance range is AVDD + 0.5 V to AVDD – 0.5 V.
Voltages developed beyond this range cause excessive DAC
distortion and could potentially damage the DAC output
circuitry. Proper attention should be paid to the load termination
to keep the output voltage within this compliance range.
R
SET
=
39
CLKMODESELECT
High
High
Low
Low
X
.
19
OUT
/
I
). Differential outputs reduce the amount of
OUT
SET
pin and the DAC ground
CFR2 [7:3]
3 < M < 21
M < 4 or M > 20
3 < M < 21
M < 4 or M > 20
X
SET
)
Rev. B | Page 14 of 28
Oscillator Enabled
Yes
Yes
No
No
No
Comparator
Many applications require a square wave signal rather than a
sine wave. For example, in most clocking applications a high
slew rate helps to reduce phase noise and jitter. To support these
applications, the AD9952 includes an on-chip comparator. The
comparator has a bandwidth greater than 200 MHz and a
common-mode input range of 1.3 V to 1.8 V. By setting the
comparator power-down bit, CFR1 [6], the comparator can be
turned off to save on power consumption.
Serial I/O Port
The AD9952 serial port is a flexible, synchronous serial
communications port that allows easy interface to many
industry-standard microcontrollers and microprocessors. The
serial I/O port is compatible with most synchronous transfer
formats, including both the Motorola 6905/11 SPI® and Intel®
8051 SSR protocols.
The interface allows read/write access to all registers that configure
the AD9952. MSB first or LSB first transfer formats are supported.
The AD9952 serial interface port can be configured as a single pin
I/O (SDIO) that allows a 2-wire interface or two unidirectional pins
for in/out (SDIO/SDO), which in turn enable a 3-wire interface.
Two optional pins, IOSYNC and CS
system design in the AD9952. Please see the Serial Port Operation
section for details on how to program the AD9952 through the
serial I/O port.
Register Map and Descriptions
The register map is listed in Table 5.
System Clock
FCLK = F
FCLK = F
FCLK = F
FCLK = F
FCLK = 0
OSC
OSC
OSC
OSC
× M
× M
Frequency Range (MHz)
80 < FCLK < 400
20 < FCLK < 30
80 < FCLK < 400
10 < FCLK < 400
N/A
, enable greater flexibility for

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