LM1237BDKD/NA/NOPB National Semiconductor, LM1237BDKD/NA/NOPB Datasheet - Page 35

• Manufacturer Part Number: LM1237BDKD/NA/NOPB
• Manufacturer: National Semiconductor

Specifications of LM1237BDKD/NA/NOPB

• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Package Type: MDIP
• Lead Free Status / RoHS Status: Compliant

Control Register Definitions
Display Window 1 Column Width Register
Register
COLWIDTH1B0 (0x8414)
Display Window 2 Horizontal Start Location Register
Register Name (address): HSTRT2 (0x8418)
Display Window 2 Vertical Start Location Register
Register Name (address): VSTRT2 (0x8419)
Display Window 2 Start Address
Register Names (addresses): W2STRTADRH (0x841B) W2STRTADRL (0x841A)
Display Window 2 Column Width Register
Register
COLWIDTH1B0 (0x841C)
COL15 COL14 COL13 COL12 COL11 COL10 COL9 COL8 COL7 COL6 COL5 COL4 COL3 COL2 COL1 COL0
COL15 COL14 COL13 COL12 COL11 COL10 COL9 COL8 COL7 COL6 COL5 COL4 COL3 COL2 COL1 COL0
Bits 31–0
Bits 7–0
Bits 7–0
Bits 8–0
Bits 15–9
COL
RSV
COL
31
31
15
15
31
31
15
2H7
2V7
7
7
COL
RSV
COL
30
30
14
14
30
30
14
Names
Names
These are the Display Window 1 Column Width 2x Enable Bits. These thirty-two bits correspond to columns
31–0 of Display Window 1, respectively. A value of zero indicates the column will have normal width (12
pixels). A value of one indicates the column will be twice as wide as normal (24 pixels). For the double wide
case, each Character Font pixel location will be displayed twice, in two consecutive horizontal pixel locations.
The user should note that if more than 32 display characters are programmed to reside on a row, then all
display characters after the first thirty-two will have normal width (12 pixels).
This register determines the horizontal start position of Window 2 in OSD pixels (not video signal pixels). The
actual position, to the right of the horizontal flyback pulse, is determined by multiplying this register value by 4
and adding 30. Due to pipeline delays, the first usable start location is approximately 42 OSD pixels following
the horizontal flyback time. For this reason, we recommend this register be programmed with a number larger
than 2, otherwise improper operation may result.
This register determines the Vertical start position of Window 2 in constant-height character lines (not video
scan lines). The actual position is determined by multiplying this register value by 2. (Note: each character line
is treated as a single auto-height character pixel line, so multiple scan lines may actually be displayed in order
to maintain accurate position relative to the OSD character cell size. See the Constant Character Height
Mechanism section.) This register should be set so the entire OSD window is within the active video.
This register determines the starting address of Display Window 2 in the Display Page RAM. This first address
location will always contain the SL code for the first row of Display Window 2.
These bits are reserved and should be set to zero.
COL
RSV
COL
29
29
13
13
29
29
13
(addresses):
(addresses):
2H6
2V6
6
6
COL
RSV
COL
28
28
12
12
28
28
12
COL
RSV
COL
27
27
11
27
27
11
11
COLWIDTH2B3
COLWIDTH1B3
2H5
2V5
5
5
COL
RSV
COL
26
26
10
10
26
26
10
COL
RSV
COL
(Continued)
25
25
25
25
9
9
9
2H4
2V4
4
4
(0x841F),
(0x8417),
2AD8 2AD7 2AD6 2AD5 2AD4 2AD3 2AD2 2AD1 2AD0
COL
COL
24
24
24
24
8
8
8
35
COL
COL
23
23
23
23
7
7
7
COLWIDTH1B2
COLWIDTH1B2
2H3
2V3
3
3
COL
COL
22
22
22
22
6
6
6
COL
COL
21
21
21
21
5
5
5
2H2
2V2
2
2
(0x841E),
(0x8416),
COL
COL
20
20
20
20
4
4
4
COL
COL
19
19
19
19
3
3
COLWIDTH2B1
3
COLWIDTH1B1
2H1
2V1
1
1
COL
COL
18
18
18
18
2
2
2
COL
COL
17
17
17
17
1
1
1
www.national.com
2H0
2V0
(0x841D),
(0x8415),
0
0
COL
COL
16
16
16
16
0
0
0