SC1112STR Semtech, SC1112STR Datasheet - Page 3

• Manufacturer Part Number: SC1112STR
• Manufacturer: Semtech

Specifications of SC1112STR

• Lead Free Status / RoHS Status: Compliant

Unless specified: 5VSTBY=4.75V to 5.25V; VTTIN=3.3V; T
Notes:
(1) All electrical characteristics are for the application circuit on page 19.
(2) Guaranteed by design
(3) Tracking Difference is defined as the delta between 3.3V Vin and the VTT, AGP, ADJ output voltages during the linear ramp up until
(4) During power up, an internal short circuit glitch timer will start once the VTT Input Voltage exceeds the VTTIN
(5) PWRGD pin is kept low during the power up, until the VTT output has reached its PG
POWER MANAGEMENT
Electrical Characteristics (Cont.)
P
L
O
O
O
V
S (
V
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A
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V
A
A
L
L
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o
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voltage or the 5VSTBY is cycled.
a
T
T
G
D
T
G
D
source current I
2006 Semtech Corp.
u
u
u
a
protection is disabled to allow VTT output to rise above the trip threshold (0.7V). If the VTT output has not risen above the trip
capacitor is charged above the PG
regulation is achieved. The Tracking Voltage difference might vary depending on MOSFETs Rdson, and Load Conditions.
timer immunity time, determined by the Delay capacitor (Delay time is approximately equal to (Cdelay*SCTH)/ISC), the short circuit
threshold after the immunity time has elapsed, the VTT output is latched off and will only be enabled again if either the VTT input
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p t
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PG
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(20uA) is enabled and will start charging the external PWRGD delay capacitor connected to the DELAY pin. Once the
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2 .
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2 .
5 .
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(1.5V), the PWRGD pin is released from ground.
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= 25°C
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7 .
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2 .
4 .
4 .
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%
0
7
2
7
7
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or PG
6
5
0
0
4
. 1
td1.5
* 2
level. At that time the PWRGD
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3
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1
1
1
T
1
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5
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5
5
2 .
2 .
5 .
5 .
3 .
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+
5
y
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0
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2
5
1
1
3 .
3 .
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5
0
0
0
p
0
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0
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0
0
0
0
A
0
0
0
0
0
TH
R /
(1.5V). During the glitch
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SC1112
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1
1
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M
+
1
1
2 .
2 .
5 .
5 .
2
5
5
4
7
a
2
7
3
3
%
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%
%
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