IDT92HD99B1X5NDGXYAX8 IDT, Integrated Device Technology Inc, IDT92HD99B1X5NDGXYAX8 Datasheet - Page 22

• Manufacturer Part Number: IDT92HD99B1X5NDGXYAX8
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT92HD99B1X5NDGXYAX8

• Lead Free Status / RoHS Status: Compliant

92HD99
SINGLE CHIP PC AUDIO SYSTEM, CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
IDT CONFIDENTIAL
©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
Power State
Digital
Mics
D1-D3
D0-D3
0
1
2
D0
D4
D5
either DMIC_0 or 1
Double Edge on
Data Sample
DMIC Widget
Single Edge
Enabled?
N/A
Yes
Yes
No
-
-
Although the internal implementation is different between the analog ports and the digital micro-
phones, the functionality is the same. In most cases, the default values for the DMIC clock rate and
data sample phase will be appropriate and an audio driver will be able to configure and use the digi-
tal microphones exactly like an analog microphone.
To conserve power, the analog portion of the ADC will be turned off if the D-mic input is selected.
When switching from the digital microphone to an analog input to the ADC, the analog portion of the
ADC will be brought back to a full power state and allowed to stabilize before switching from the dig-
ital microphone to the analog input. This should take less than 10mS.
DMIC pin widgets support port presence detect directly using SENSE-B input.
The codec supports the following digital microphone configurations:
Clock Disabled
Clock Disabled
Clock Disabled
Clock Disabled
Clock Capable
Table 14. DMIC_CLK and DMIC_0 Operation During Power States
DMIC_CLK
Conn.
0, or 1
0, or 1
Output
ADC
N/A
Table 13. Valid Digital Mic Configurations
Available on either DMIC_0 or DMIC_1, External logic required to support sampling on a
common data line), configure the microphone for “Left” and select mono operation using
falling edge of DMIC_CLK for those digital microphones that don’t support alternative
single Digital Mic pin channel on rising edge and second Digital Mic right channel on
When using a microphone that supports multiplexed operation (2-mics can share a
Input Disabled
Input Disabled
Input Disabled
Input Disabled
Input Capable
DMIC_0
“Left” D-mic data is used for ADC left and right channels.
22
clock edge (multiplexed output) capability.
Available on either DMIC_0 or DMIC_1
DMIC_CLK Output is Enabled when DMIC_0 Input Widget is
Enabled. Otherwise, the DMIC_CLK remains Low
the vendor specific verb.
No Digital Microphones
DMIC_CLK is HIGH-Z with Weak Pull-down
DMIC_CLK is HIGH-Z with Weak Pull-down
DMIC_CLK is HIGH-Z with Weak Pull-down
DMIC_CLK is HIGH-Z with Weak Pull-down
Notes
Notes
V 0.91 10/10
92HD99