MF10CCJ National Semiconductor, MF10CCJ Datasheet - Page 23

• Manufacturer Part Number: MF10CCJ
• Manufacturer: National Semiconductor

Specifications of MF10CCJ

• Architecture: Switched Capacitor
• Cutoff Frequency: 30KHz
• Dual Supply Voltage (typ): ±5V
• Power Supply Requirement: Single/Dual
• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Operating Temperature Classification: Commercial
• Filter Type: Universal
• Lead Free Status / RoHS Status: Not Compliant

3.0 Applications Information
3.2 SINGLE SUPPLY OPERATION
The MF10 can also operate with a single-ended power sup-
ply. Figure 17 shows the example filter with a single-ended
power supply. V
positive power supply (8V to 14V), and V
connected to ground. The A
single supply operation. This half-supply point should be
very “clean”, as any noise appearing on it will be treated as
an input to the filter. It can be derived from the supply voltage
with a pair of resistors and a bypass capacitor ( Figure 18a ),
or a low-impedance half-supply voltage can be made using a
three-terminal voltage regulator or an operational amplifier
( Figure 18b and Figure 18c ). The passive resistor divider
with a bypass capacitor is sufficient for many applications,
provided that the time constant is long enough to reject any
power supply noise. It is also important that the half-supply
reference present a low impedance to the clock frequency,
so at very low clock frequencies the regulator or op-amp
approaches may be preferable because they will require
smaller capacitors to filter the clock frequency. The main
power supply voltage should be clean (preferably regulated)
and bypassed with 0.1 µF.
3.3 DYNAMIC CONSIDERATIONS
The maximum signal handling capability of the MF10, like
that of any active filter, is limited by the power supply volt-
ages used. The amplifiers in the MF10 are able to swing to
within about 1V of the supplies, so the input signals must be
kept small enough that none of the outputs will exceed these
limits. If the MF10 is operating on
outputs will clip at about 8 V
multiplied by the filter gain should therefore be less than
8 V
Note that if the filter Q is high, the gain at the lowpass or
highpass outputs will be much greater than the nominal filter
gain ( Figure 6 ). As an example, a lowpass filter with a Q of
10 will have a 20 dB peak in its amplitude response at f
the nominal gain of the filter H
will be 10. The maximum input signal at f
less than 800 mV
supplies.
Also note that one output can have a reasonable small
voltage on it while another is saturated. This is most likely for
a circuit such as the notch in Mode 1 ( Figure 7 ). The notch
output will be very small at f
apply a large signal to the input. However, the bandpass will
have its maximum gain at f
output clips, the performance at the other outputs will be
degraded, so avoid overdriving any filter section, even ones
whose outputs are not being directly used. Accompanying
Figure 7 through Figure 15 are equations labeled “circuit
dynamics”, which relate the Q and the gains at the various
outputs. These should be consulted to determine peak circuit
gains and maximum allowable signals for a given applica-
tion.
3.4 OFFSET VOLTAGE
The MF10’s switched capacitor integrators have a higher
equivalent input offset voltage than would be found in a
typical continuous-time active filter integrator. Figure 19
shows an equivalent circuit of the MF10 from which the
output DC offsets can be calculated. Typical values for these
offsets with S
(Continued)
p–p
.
A/B
A
tied to V
+
p–p
and V
when the circuit is operated on
+
O
D
are:
GND
p–p
+
and can clip if overdriven. If one
OLP
O
are again connected to the
. The maximum input voltage
, so it might appear safe to
pin must be tied to V
is equal to 1, the gain at f
±
5V, for example, the
O
must therefore be
A
−
and V
D
+
−
/2 for
±
O
are
5V
. If
O
23
When S
DC offset at the BP output is equal to the input offset of the
lowpass integrator (V
depend on the mode of operation and the resistor ratios, as
described in the following expressions.
V
V
V
os1
os2
os3
= opamp offset =
= −150 mV
= −70 mV
A/B
is tied to V
@
@
50:1:
50:1:
os3
−
, V
±
). The offsets at the other outputs
5 mV
os2
will approximately halve. The
−300 mV
−140 mV
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@
@
100:1
100:1