S29GL032M10TAIR40 Spansion Inc., S29GL032M10TAIR40 Datasheet - Page 28
S29GL032M10TAIR40
Manufacturer Part Number
S29GL032M10TAIR40
Description
IC,EEPROM,NOR FLASH,2MX16/4MX8,CMOS,TSSOP,48PIN,PLASTIC
Manufacturer
Spansion Inc.
Datasheets
1.S29GL032M10FCIR43.pdf
(160 pages)
2.S29GL032M10TAIR40.pdf
(160 pages)
3.S29GL064M90TFIR40.pdf
(116 pages)
4.S29GL032M10TAIR40.pdf
(159 pages)
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
S29GL032M10TAIR40
Manufacturer:
SPANSIO10
Quantity:
186
- S29GL032M10FCIR43 PDF datasheet
- S29GL032M10TAIR40 PDF datasheet #2
- S29GL064M90TFIR40 PDF datasheet #3
- S29GL032M10TAIR40 PDF datasheet #4
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- Download datasheet (6Mb)
Device Bus Operations
Legend: L = Logic Low = V
Address, A
Notes:
1. Addresses are Amax:A0 in word mode; Amax:A-1 in byte mode. Sector addresses are Amax:A15 in both modes.
2. The sector protect and sector unprotect functions may also be implemented via programming equipment. See the
3. If WP# = V
4. D
28
Read
Write (Program/Erase)
Accelerated Program
Standby
Output Disable
Reset
Sector Group Protect
(Note 2)
Sector Group
Unprotect
(Note 2)
Temporary Sector
Group Unprotect
“Sector Group Protection and Unprotection” section.
are protected (for boot sector devices). If WP# = V
protected or unprotected as determined by the method described in “Sector Group Protection and Unprotection”.
All sectors are unprotected when shipped from the factory (The SecSi Sector may be factory protected depending
on version ordered.)
IN
Operation
or D
IN
OUT
= Address In, D
IL
as required by command sequence, data polling, or sector protect algorithm (see Figure 2).
, the first or last sector remains protected (for uniform sector devices), and the two outer boot sectors
This section describes the requirements and use of the device bus operations,
which are initiated through the internal command register. The command register
itself does not occupy any addressable memory location. The register is a latch
used to store the commands, along with the address and data information
needed to execute the command. The contents of the register serve as inputs to
the internal state machine. The state machine outputs dictate the function of the
device. Table 1 lists the device bus operations, the inputs and control levels they
require, and the resulting output. The following subsections describe each of
these operations in further detail.
± 0.3
CE#
V
V
X
X
L
L
L
L
L
L
CC
IL
, H = Logic High = V
IN
OE#
= Data In, D
H
H
H
H
H
X
X
X
L
WE
#
H
H
L
L
X
X
L
L
X
Table 1. Device Bus Operations
S29GLxxxM MirrorBit
RESET#
OUT
V
0.3 V
V
V
V
CC
H
H
H
H
L
ID
ID
ID
IH
= Data Out
±
, V
ID
(Note
(Note
IH
WP#
= 11.5–12.5 V, V
P r e l i m i n a r y
3)
3)
H
H
H
, the first or last sector, or the two outer boot sectors will be
X
X
X
X
TM
ACC
Flash Family
V
H
X
X
X
X
X
X
X
HH
A3=L, A2=L,
A3=L, A2=L,
A1=H, A0=L
A1=H, A0=L
HH
SA, A6 =L,
SA, A6=H,
Addresses
(Note 1)
= 11.5–12.5 V, X = Don’t Care, SA = Sector
A
A
A
A
X
X
X
IN
IN
IN
IN
High-Z High-Z
High-Z High-Z
High-Z High-Z
DQ0–
(Note
(Note
(Note
(Note
(Note
D
DQ7
4)
4)
4)
4)
4)
OUT
S29GLxxxM_00A5 April 30, 2004
BYTE#
(Note
(Note
(Note
= V
D
4)
4)
4)
OUT
X
X
IH
DQ8–DQ15
DQ15 = A-1
DQ8–DQ14
= High-Z,
High-Z
High-Z
High-Z
High-Z
BYTE#
= V
X
X
IL
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