PIC18F6628-E/PT Microchip Technology, PIC18F6628-E/PT Datasheet
PIC18F6628-E/PT
Specifications of PIC18F6628-E/PT
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PIC18F6628-E/PT Summary of contents
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... Enhanced Flash Microcontrollers with 12-Bit A/D and nanoWatt Technology © 2009 Microchip Technology Inc. PIC18F8723 Family Data Sheet 64/80-Pin, 1-Mbit, DS39894B ...
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... REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
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... Four Input Change Interrupts External Memory Interface: • Address Capability Mbytes • 8-Bit or 16-Bit Interface • 8, 12, 16 and 20-Bit Address modes Program Memory Device Flash # Single-Word SRAM (bytes) Instructions (bytes) PIC18F6628 96K 49152 3936 PIC18F6723 128K 65536 3936 PIC18F8628 96K 49152 3936 PIC18F8723 ...
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... RF7/SS1 11 RF6/AN11 12 RF5/AN10/CV REF 13 RF4/AN9 14 RF3/AN8 15 RF2/AN7/C1OUT Note 1: The ECCP2/P2A pin placement is determined by the CCP2MX Configuration bit. DS39894B-page PIC18F6628 41 PIC18F6723 RB0/INT0 RB1/INT1 RB2/INT2 RB3/INT3 RB4/KBI0 RB5/KBI1/PGM RB6/KBI2/PGC V SS OSC2/CLKO/RA6 OSC1/CLKI/RA7 V DD RB7/KBI3/PGD RC5/SDO1 RC4/SDI1/SDA1 RC3/SCK1/SCL1 RC2/ECCP1/P1A © 2009 Microchip Technology Inc. ...
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... RF4/AN9 16 RF3/AN8 17 RF2/AN7/C1OUT 18 (2) RH7/AN15/P1B 19 (2) RH6/AN14/P1C Note 1: The ECCP2/P2A pin placement is determined by the CCP2MX Configuration bit and Processor mode settings. 2: P1B, P1C, P3B and P3C pin placement is determined by the ECCPMX Configuration bit. © 2009 Microchip Technology Inc PIC18F8628 51 PIC18F8723 50 49 ...
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... Appendix D: Migration From Baseline to Enhanced Devices............................................................................................................... 52 Appendix E: Migration From Mid-Range to Enhanced Devices ........................................................................................................... 53 Appendix F: Migration From High-End to Enhanced Devices.............................................................................................................. 53 Index .................................................................................................................................................................................................... 55 The Microchip Web Site ....................................................................................................................................................................... 57 Customer Change Notification Service ................................................................................................................................................ 57 Customer Support ................................................................................................................................................................................ 57 Reader Response ................................................................................................................................................................................ 58 PIC18F8723 family Product Identification System ............................................................................................................................... 59 DS39894B-page 6 © 2009 Microchip Technology Inc. ...
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... When contacting a sales office, please specify which device, revision of silicon and data sheet (include literature number) you are using. Customer Notification System Register on our web site at www.microchip.com to receive the most current information on all of our products. © 2009 Microchip Technology Inc. PIC18F8723 DS39894B-page 7 ...
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... PIC18F8723 NOTES: DS39894B-page 8 © 2009 Microchip Technology Inc. ...
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... The devices are differentiated from each other in the following ways: • Flash program memory (96 Kbytes for PIC18FX628 devices and 128 Kbytes for PIC18FX723). • A/D channels (12 for PIC18F6628/6723 devices and 16 for PIC18F8628/8723 devices). • I/O ports (seven bidirectional ports on PIC18F6628/6723 devices and nine bidirectional ports on PIC18F8628/8723 devices). ...
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... PIC18F8723 FAMILY TABLE 1-1: DEVICE FEATURES Features PIC18F6628 Operating Frequency DC – 40 MHz Program Memory (Bytes) 96K Program Memory (Instructions) 49152 Data Memory (Bytes) 3936 Data EEPROM Memory (Bytes) 1024 Interrupt Sources I/O Ports Ports Ports Timers Capture/Compare/PWM Modules Enhanced Capture/Compare/ PWM Modules ...
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... FIGURE 1-1: PIC18F6628/6723 (64-PIN) BLOCK DIAGRAM Table Pointer<21> inc/dec logic 21 20 Address Latch Program Memory (48/64/96/128 Kbytes) Data Latch 8 Table Latch ROM Latch Instruction Bus <16> Instruction Decode and Control Internal (3) OSC1 Oscillator Block (3) OSC2 INTRC Oscillator T1OSI 8 MHz Oscillator T1OSO ...
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... Clock Monitor Timer1 Timer2 Timer3 Timer4 CCP4 CCP5 EUSART1 EUSART2 PORTA (1) RA0:RA7 PORTB (1) RB0:RB7 4 PORTC Access Bank (1) RC0:RC7 12 PORTD (1) RD0:RD7 PORTE (1) RE0:RE7 8 PORTF PRODL (1) RF0:RF7 8 8 PORTG 8 (1,2) RG0:RG5 8 PORTH 8 (1) RH0:RH7 PORTJ (1) RJ0:RJ7 Comparators MSSP1 MSSP2 © 2009 Microchip Technology Inc. ...
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... TABLE 1-2: PIC18F6628/6723 (64-PIN) PINOUT I/O DESCRIPTIONS Pin Number Pin Name TQFP RG5/MCLR RG5 MCLR V PP OSC1/CLKI/RA7 39 OSC1 CLKI RA7 OSC2/CLKO/RA6 40 OSC2 CLKO RA6 Legend: TTL = TTL compatible input ST = Schmitt Trigger input with CMOS levels I = Input P = Power Note 1: Default assignment for ECCP2 when Configuration bit, CCP2MX, is set. ...
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... PIC18F8723 FAMILY TABLE 1-2: PIC18F6628/6723 (64-PIN) PINOUT I/O DESCRIPTIONS (CONTINUED) Pin Number Pin Name TQFP RA0/AN0 24 RA0 AN0 RA1/AN1 23 RA1 AN1 RA2/AN2 REF RA2 AN2 V - REF RA3/AN3 REF RA3 AN3 V + REF RA4/T0CKI 28 RA4 T0CKI RA5/AN4/HLVDIN 27 RA5 AN4 HLVDIN RA6 RA7 Legend: TTL = TTL compatible input ...
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... TABLE 1-2: PIC18F6628/6723 (64-PIN) PINOUT I/O DESCRIPTIONS (CONTINUED) Pin Number Pin Name TQFP RB0/INT0/FLT0 48 RB0 INT0 FLT0 RB1/INT1 47 RB1 INT1 RB2/INT2 46 RB2 INT2 RB3/INT3 45 RB3 INT3 RB4/KBI0 44 RB4 KBI0 RB5/KBI1/PGM 43 RB5 KBI1 PGM RB6/KBI2/PGC 42 RB6 KBI2 PGC RB7/KBI3/PGD 37 RB7 KBI3 PGD ...
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... PIC18F8723 FAMILY TABLE 1-2: PIC18F6628/6723 (64-PIN) PINOUT I/O DESCRIPTIONS (CONTINUED) Pin Number Pin Name TQFP RC0/T1OSO/T13CKI 30 RC0 T1OSO T13CKI RC1/T1OSI/ECCP2/ 29 P2A RC1 T1OSI (1) ECCP2 (1) P2A RC2/ECCP1/P1A 33 RC2 ECCP1 P1A RC3/SCK1/SCL1 34 RC3 SCK1 SCL1 RC4/SDI1/SDA1 35 RC4 SDI1 SDA1 RC5/SDO1 36 RC5 SDO1 RC6/TX1/CK1 ...
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... TABLE 1-2: PIC18F6628/6723 (64-PIN) PINOUT I/O DESCRIPTIONS (CONTINUED) Pin Number Pin Name TQFP RD0/PSP0 58 RD0 PSP0 RD1/PSP1 55 RD1 PSP1 RD2/PSP2 54 RD2 PSP2 RD3/PSP3 53 RD3 PSP3 RD4/PSP4/SDO2 52 RD4 PSP4 SDO2 RD5/PSP5/SDI2/ 51 SDA2 RD5 PSP5 SDI2 SDA2 RD6/PSP6/SCK2/ 50 SCL2 RD6 PSP6 SCK2 SCL2 ...
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... PIC18F8723 FAMILY TABLE 1-2: PIC18F6628/6723 (64-PIN) PINOUT I/O DESCRIPTIONS (CONTINUED) Pin Number Pin Name TQFP RE0/RD/P2D 2 RE0 RD P2D RE1/WR/P2C 1 RE1 WR P2C RE2/CS/P2B 64 RE2 CS P2B RE3/P3C 63 RE3 P3C RE4/P3B 62 RE4 P3B RE5/P1C 61 RE5 P1C RE6/P1B 60 RE6 P1B RE7/ECCP2/P2A 59 RE7 (2) ECCP2 (2) P2A Legend: TTL = TTL compatible input ...
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... TABLE 1-2: PIC18F6628/6723 (64-PIN) PINOUT I/O DESCRIPTIONS (CONTINUED) Pin Number Pin Name TQFP RF0/AN5 18 RF0 AN5 RF1/AN6/C2OUT 17 RF1 AN6 C2OUT RF2/AN7/C1OUT 16 RF2 AN7 C1OUT RF3/AN8 15 RF3 AN8 RF4/AN9 14 RF4 AN9 RF5/AN10/CV 13 REF RF5 AN10 CV REF RF6/AN11 12 RF6 AN11 RF7/SS1 11 RF7 SS1 ...
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... PIC18F8723 FAMILY TABLE 1-2: PIC18F6628/6723 (64-PIN) PINOUT I/O DESCRIPTIONS (CONTINUED) Pin Number Pin Name TQFP RG0/ECCP3/P3A 3 RG0 ECCP3 P3A RG1/TX2/CK2 4 RG1 TX2 CK2 RG2/RX2/DT2 5 RG2 RX2 DT2 RG3/CCP4/P3D 6 RG3 CCP4 P3D RG4/CCP5/P1D 8 RG4 CCP5 P1D RG5 V 9, 25, 41 10, 26, 38 Legend: TTL = TTL compatible input ...
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... Default assignment for ECCP2 in all operating modes (CCP2MX is set). 3: Alternate assignment for ECCP2 when CCP2MX is cleared (Microcontroller mode only). 4: Default assignment for P1B/P1C/P3B/P3C (ECCPMX is set). 5: Alternate assignment for P1B/P1C/P3B/P3C (ECCPMX is clear). © 2009 Microchip Technology Inc. PIC18F8723 FAMILY Pin Buffer Type Type Master Clear (input) or programming voltage (input). ...
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... I/O TTL Digital I/O. I Analog Analog input 4. I Analog High/Low-Voltage Detect input. See the OSC2/CLKO/RA6 pin. See the OSC1/CLKI/RA7 pin. CMOS = CMOS compatible input or output Analog = Analog input O = Output 2 I C™/SMB = I Description 2 C/SMBus input buffer © 2009 Microchip Technology Inc. ...
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... Alternate assignment for ECCP2 when CCP2MX is cleared (Microcontroller mode only). 4: Default assignment for P1B/P1C/P3B/P3C (ECCPMX is set). 5: Alternate assignment for P1B/P1C/P3B/P3C (ECCPMX is clear). © 2009 Microchip Technology Inc. PIC18F8723 FAMILY Pin Buffer Type Type PORTB is a bidirectional I/O port. PORTB can be software programmed for internal weak pull-ups on all inputs ...
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... EUSART1 synchronous clock (see related RX1/DT1). I/O ST Digital I/ EUSART1 asynchronous receive. I/O ST EUSART1 synchronous data (see related TX1/CK1). CMOS = CMOS compatible input or output Analog = Analog input O = Output 2 I C™/SMB = I Description 2 C™ mode. 2 C/SMBus input buffer © 2009 Microchip Technology Inc. ...
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... Default assignment for ECCP2 in all operating modes (CCP2MX is set). 3: Alternate assignment for ECCP2 when CCP2MX is cleared (Microcontroller mode only). 4: Default assignment for P1B/P1C/P3B/P3C (ECCPMX is set). 5: Alternate assignment for P1B/P1C/P3B/P3C (ECCPMX is clear). © 2009 Microchip Technology Inc. PIC18F8723 FAMILY Pin Buffer Type Type PORTD is a bidirectional I/O port. ...
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... ECCP1 PWM output B. I/O ST Digital I/O. I/O TTL External memory address/data 15. I/O ST Enhanced Capture 2 input/Compare 2 output/ PWM2 output. O — ECCP2 PWM output A. CMOS = CMOS compatible input or output Analog = Analog input O = Output 2 I C™/SMB = I Description 2 C/SMBus input buffer © 2009 Microchip Technology Inc. ...
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... Default assignment for ECCP2 in all operating modes (CCP2MX is set). 3: Alternate assignment for ECCP2 when CCP2MX is cleared (Microcontroller mode only). 4: Default assignment for P1B/P1C/P3B/P3C (ECCPMX is set). 5: Alternate assignment for P1B/P1C/P3B/P3C (ECCPMX is clear). © 2009 Microchip Technology Inc. PIC18F8723 FAMILY Pin Buffer Type Type PORTF is a bidirectional I/O port. ...
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... Capture 4 input/Compare 4 output/PWM4 output. O — ECCP3 PWM output D. I/O ST Digital I/O. I/O ST Capture 5 input/Compare 5 output/PWM5 output. O — ECCP1 PWM output D. See RG5/MCLR/V PP CMOS = CMOS compatible input or output Analog = Analog input O = Output 2 I C™/SMB = I Description pin. 2 C/SMBus input buffer © 2009 Microchip Technology Inc. ...
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... Default assignment for ECCP2 in all operating modes (CCP2MX is set). 3: Alternate assignment for ECCP2 when CCP2MX is cleared (Microcontroller mode only). 4: Default assignment for P1B/P1C/P3B/P3C (ECCPMX is set). 5: Alternate assignment for P1B/P1C/P3B/P3C (ECCPMX is clear). © 2009 Microchip Technology Inc. PIC18F8723 FAMILY Pin Buffer Type Type PORTH is a bidirectional I/O port. ...
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... Positive supply for logic and I/O pins. P — Ground reference for analog modules. P — Positive supply for analog modules. CMOS = CMOS compatible input or output Analog = Analog input O = Output 2 I C™/SMB = I Description 2 C/SMBus input buffer © 2009 Microchip Technology Inc. ...
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... ADON: A/D On bit 1 = A/D Converter module is enabled 0 = A/D Converter module is disabled Note 1: These channels are not implemented on PIC18F6628/6723 devices. 2: Performing a conversion on unimplemented channels will return a floating input measurement. © 2009 Microchip Technology Inc. PIC18F8723 FAMILY The ADCON0 register, shown in Register 2-1, controls the operation of the A/D module ...
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... AN15 through AN12 are available only on PIC18F8628/8723 devices. DS39894B-page 32 R/W-0 R/W-0 VCFG0 PCFG3 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared A REF External V - REF + External V - REF Digital I/O R/W-0 R/W-0 R/W-0 PCFG2 PCFG1 PCFG0 bit Bit is unknown © 2009 Microchip Technology Inc. ...
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... F /2 OSC Note 1: If the A/D F clock source is selected, a delay of one T RC clock starts. This allows the SLEEP instruction to be executed before starting a conversion. © 2009 Microchip Technology Inc. PIC18F8723 FAMILY R/W-0 R/W-0 R/W-0 ACQT1 ACQT0 ADCS2 U = Unimplemented bit, read as ‘0’ ...
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... Converter V Reference Voltage V Note 1: Channels AN12 through AN15 are not available on PIC18F6628/6723 devices. 2: I/O pins have diode protection to V DS39894B-page 34 A device Reset forces all registers to their Reset state. This forces the A/D module to be turned off and any conversion in progress is aborted. ...
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... SS = Sampling Switch C = Sample/Hold Capacitance (from DAC) HOLD R = Sampling Switch Resistance SS © 2009 Microchip Technology Inc. PIC18F8723 FAMILY 5. Wait for A/D conversion to complete by either: • Polling for the GO/DONE bit to be cleared OR • Waiting for the A/D interrupt 6. Read A/D Result registers (ADRESH:ADRESL); ...
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... T based assumptions: ). The DD C HOLD Rs Conversion Error V DD Temperature (- HOLD ln(1/4096) S COFF ) ln(1/4096) µs . This calculation is ACQ the following application system = 2.5 kΩ ≤ 1/2 LSb 3V → Rss = 4 kΩ 85°C (system max µs. © 2009 Microchip Technology Inc. ...
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... The RC source has a typical T 2: For device frequencies above 1 MHz, the device must be in Sleep for the entire conversion divider should be used instead; otherwise, the A/D accuracy specification may not be met. © 2009 Microchip Technology Inc. PIC18F8723 FAMILY 2.3 Selecting the A/D Conversion ...
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... The voltage on the pin will be accurately converted. 2: Analog levels on any pin defined as a dig- ital input may cause the digital input buffer to consume current out of the device’s specification limits. clock will be converted. OL © 2009 Microchip Technology Inc. ...
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... Conversion starts Time (Holding capacitor is disconnected) Set GO/DONE bit (Holding capacitor continues acquiring input) © 2009 Microchip Technology Inc. PIC18F8723 FAMILY After the A/D conversion is completed or aborted wait is required before the next acquisition can CY be started. After this wait, acquisition on the selected channel is automatically started ...
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... PORTA<7:6> and their direction bits are individually configured as port pins based on various primary oscillator modes. When disabled, these bits read as ‘0’. 2: These registers are not implemented on PIC18F6628/6723 devices. 3: For these Reset values, see the “PIC18F8722 Family Data Sheet” (DS39646). ...
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... Legend unknown Note 1: See Register 3-1 and Register 3-2 for DEVID values. DEVID registers are read-only and cannot be programmed by the user. © 2009 Microchip Technology Inc. PIC18F8723 FAMILY 3.1 Device ID Registers The Device ID registers are “read-only” registers. They identify the device type and revision to device programmers and can be read by firmware using table reads ...
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... U = Unimplemented bit, read as ‘0’ Unchanged from programmed state DEV7 DEV6 DEV5 U = Unimplemented bit, read as ‘0’ Unchanged from programmed state DEV2:DEV0 (DEVID1<7:5>) 110 000 111 001 R R REV1 REV0 bit DEV4 DEV3 bit 0 Device PIC18F6628 PIC18F6723 PIC18F8628 PIC18F8723 © 2009 Microchip Technology Inc. ...
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... This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. © 2009 Microchip Technology Inc. PIC18F8723 FAMILY (except V and MCLR) ...
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... FIGURE 4-2: PIC18F8723 FAMILY VOLTAGE-FREQUENCY GRAPH (EXTENDED) 6.0V 5.5V 5.0V 4.5V 4.0V 3.5V 3.0V 2.5V 2. MHz in 8-Bit External Memory mode. MAX MHz in all other modes. MAX DS39894B-page 44 PIC18F8723 Family Frequency PIC18F8723 Family Frequency © 2009 Microchip Technology Inc. 4.2V F MAX 4.2V F MAX ...
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... MHz MAX In all other modes (16.36 MHz/V) (V MAX MHz MAX Note the minimum voltage of the PIC DDAPPMIN © 2009 Microchip Technology Inc. PIC18F8723 FAMILY PIC18LF8723 Family Frequency – 2.0V MHz DDAPPMIN DDAPPMIN > 4.2V. DDAPPMIN – 2.0V MHz; DDAPPMIN > 4.2V. DDAPPMIN ® ...
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... DD = 3.0V ΔV ≥ 3. REF 3.0V ΔV ≥ 3. REF V = 5.0V DD ≤ V ≤ AIN REF For 12-bit resolution For 12-bit resolution For 12-bit resolution During V acquisition. AIN During A/D conversion cycle. source. V current is from REFH REFL © 2009 Microchip Technology Inc. ...
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... ADRES registers may be read on the following T 3: The time for the holding capacitor to acquire the “New” input voltage when the voltage changes full scale after the conversion ( the following cycle of the device clock. © 2009 Microchip Technology Inc. PIC18F8723 FAMILY 131 130 . . . . . . 10 9 ...
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... PIC18F8723 FAMILY NOTES: DS39894B-page 48 © 2009 Microchip Technology Inc. ...
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... PACKAGING INFORMATION For packaging information, see the “PIC18F8722 Family Data Sheet” (DS39646). © 2009 Microchip Technology Inc. PIC18F8723 FAMILY DS39894B-page 49 ...
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... PIC18F8723 FAMILY NOTES: DS39894B-page 50 © 2009 Microchip Technology Inc. ...
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... Parallel Communications (PSP) External Memory Bus 12-Bit Analog-to-Digital Module 12 Input Channels Packages © 2009 Microchip Technology Inc. PIC18F8723 FAMILY APPENDIX B: The differences between the devices listed in this data sheet are shown in Table B-1. PIC18F6628 PIC18F6723 96K 128K 49152 65536 28 28 Ports ...
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... DS39894B-page 52 APPENDIX D: MIGRATION FROM BASELINE TO ENHANCED DEVICES This section discusses how to migrate from a Baseline device (i.e., PIC16C5X Enhanced MCU device (i.e., PIC18FXXX). The following are the list of modifications over the PIC16C5X microcontroller family: Not Currently Available © 2009 Microchip Technology Inc. ...
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... AN716, “Migrating Designs from PIC16C74A/74B to PIC18C442”. The changes discussed, while device specific, are generally applicable to all mid-range to enhanced device migrations. This Application Note is available on our web site, www.microchip.com, as Literature Number DS00716. © 2009 Microchip Technology Inc. PIC18F8723 FAMILY APPENDIX F: MIGRATION FROM HIGH-END TO ENHANCED DEVICES A detailed discussion of the migration pathway and differences between the high-end MCU devices (i ...
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... PIC18F8723 FAMILY NOTES: DS39894B-page 54 © 2009 Microchip Technology Inc. ...
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... ADCON1 Register............................................................... 31 ADCON2 Register............................................................... 31 ADRESH Register............................................................... 31 ADRESL Register ......................................................... 31, 34 Analog-to-Digital Converter. See A/D. B Block Diagrams A/D .............................................................................. 34 Analog Input Model ..................................................... 35 PIC18F6628/6723....................................................... 11 PIC18F8628/8723....................................................... 12 C Compare (ECCP2 Module) Special Event Trigger.................................................. 40 Conversion Considerations ................................................. 52 Customer Change Notification Service ............................... 57 Customer Notification Service............................................. 57 Customer Notification System............................................... 7 Customer Support ............................................................... 57 D Device Differences ...
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... DD V .............................................................................. .............................................................................. .............................................................................. 30 SS DS39894B-page 56 Pinout I/O Descriptions PIC18F6628/6723 ...................................................... 13 PIC18F8628/8723 ...................................................... 21 Power-Managed Modes........................................................ 3 and A/D Operation ...................................................... 38 Product Identification System ............................................. 59 R Reader Response............................................................... 58 Registers ADCON0 (A/D Control 0)............................................ 31 ADCON1 (A/D Control 1)............................................ 32 ADCON2 (A/D Control 2)............................................ 33 DEVID1 (Device ID 1)................................................. 42 DEVID2 (Device ID 2)................................................. 42 Revision History ...
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... To register, access the Microchip web site at www.microchip.com, click on Customer Change Notification and follow the registration instructions. © 2009 Microchip Technology Inc. PIC18F8723 FAMILY CUSTOMER SUPPORT Users of Microchip products can receive assistance through several channels: • ...
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... What deletions from the document could be made without affecting the overall usefulness there any incorrect or misleading information (what and where)? 7. How would you improve this document? DS39894B-page 58 Total Pages Sent ________ FAX: (______) _________ - _________ N Literature Number: DS39894B © 2009 Microchip Technology Inc. ...
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... PIC18F8723 FAMILY PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office PART NO. X /XX Device Temperature Package Range (1) (2) Device PIC18F6628/6723, PIC18F8628/8723, V range 4.2V to 5.5V DD PIC18LF6628/6723, PIC18LF6628/6723 V range 2.0V to 5.5V DD Temperature I = -40°C to +85°C (Industrial) ...
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... Fax: 886-3-6578-370 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2009 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...