PIC12LF1840-E/SN Microchip Technology, PIC12LF1840-E/SN Datasheet - Page 31

• Manufacturer Part Number: PIC12LF1840-E/SN
• Description: 7 KB Flash, 256 Bytes RAM, 32 MHz Int. Osc, 6 I/0, Enhanced Mid Range Core, Nano
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 12Fr

Specifications of PIC12LF1840-E/SN

• Processor Series: PIC12F
• Core: PIC
• Program Memory Type: Flash
• Program Memory Size: 7 KB
• Data Ram Size: 256 B
• Interface Type: MI2C, SPI, EUSART
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: SOIC-8
• Development Tools By Supplier: MPLAB IDE Software
• Minimum Operating Temperature: - 40 C
• Core Processor: RISC
• Core Size: 8-Bit
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 5
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Lead Free Status / Rohs Status: Details

TABLE 3-7:
 2011 Microchip Technology Inc.
380h
381h
382h
383h
384h
385h
386h
387h
388h
389h
38Ah
38Bh
38Ch
38Dh
38Eh
38Fh
390h
391h
392h
393h
394h
395h
396h
397h
398h
399h
39Ah
39Bh
39Ch
39Dh
39Eh
39Fh
Legend:
Note
Address
Bank 7
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
1: These registers can be addressed from any bank.
2: PIC12F1840 only.
INDF0
INDF1
PCL
STATUS
FSR0L
FSR0H
FSR1L
FSR1H
BSR
WREG
PCLATH
INTCON
—
—
—
—
—
IOCAP
IOCAN
IOCAF
—
—
—
—
—
—
CLKRCON
—
MDCON
MDSRC
MDCARL
MDCARH
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, r = reserved.
Name
Shaded locations are unimplemented, read as ‘0’.
SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Addressing this location uses contents of FSR0H/FSR0L to address data memory
(not a physical register)
Addressing this location uses contents of FSR1H/FSR1L to address data memory
(not a physical register)
Program Counter (PC) Least Significant Byte
Indirect Data Memory Address 0 Low Pointer
Indirect Data Memory Address 0 High Pointer
Indirect Data Memory Address 1 Low Pointer
Indirect Data Memory Address 1 High Pointer
Working Register
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
MDMSODIS
MDCHODIS MDCHPOL MDCHSYNC
MDCLODIS
CLKREN
MDEN
Bit 7
GIE
—
—
—
—
—
—
Write Buffer for the upper 7 bits of the Program Counter
MDCLPOL
CLKROE
MDOE
PEIE
Bit 6
—
—
—
—
—
—
MDCLSYNC
CLKRSLR
TMR0IE
IOCAP5
IOCAN5
IOCAF5
MDSLR
Bit 5
—
—
—
Preliminary
MDOPOL
IOCAN4
IOCAP4
IOCAF4
Bit 4
INTE
TO
—
—
—
CLKRDC<1:0>
IOCAN3
IOCAP3
IOCAF3
MDOUT
IOCIE
Bit 3
PD
BSR<4:0>
TMR0IF
IOCAP2
IOCAN2
IOCAF2
Bit 2
—
Z
MDMS<3:0>
MDCH<3:0>
MDCL<3:0>
PIC12(L)F1840
CLKRDIV<2:0>
IOCAP1
IOCAN1
IOCAF1
Bit 1
INTF
DC
—
IOCAN0
IOCAP0
IOCAF0
MDBIT
IOCIF
Bit 0
C
DS41441B-page 31
xxxx xxxx xxxx xxxx
xxxx xxxx xxxx xxxx
0000 0000 0000 0000
---1 1000 ---q quuu
0000 0000 uuuu uuuu
0000 0000 0000 0000
0000 0000 uuuu uuuu
0000 0000 0000 0000
---0 0000 ---0 0000
0000 0000 uuuu uuuu
-000 0000 -000 0000
0000 000x 0000 000u
--00 0000 --00 0000
--00 0000 --00 0000
--00 0000 --00 0000
0011 0000 0011 0000
0010 ---0 0010 ---0
x--- xxxx u--- uuuu
xxx- xxxx uuu- uuuu
xxx- xxxx uuu- uuuu
POR, BOR
Value on
—
—
—
—
—
—
—
—
—
—
—
—
Value on all
Resets
other
—
—
—
—
—
—
—
—
—
—
—
—