HC55121IM Intersil, HC55121IM Datasheet - Page 30

• Manufacturer Part Number: HC55121IM
• Manufacturer: Intersil

Specifications of HC55121IM

• Number Of Channels: 1
• On-hook Transmission: Yes
• Polarity Reversal: Yes
• On-chip Ring Relay Driver: Yes
• Longitudinal Balanced: 53
• Operating Supply Voltage (typ): 5V
• Operating Temp Range: -40C to 85C
• Package Type: PLCC
• Loop Current Limit: 30mA
• Operating Temperature Classification: Industrial
• Pin Count: 28
• Mounting: Surface Mount
• Operating Current: 2.7mA
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Lead Free Status / RoHS Status: Not Compliant

Pin Descriptions
PLCC
PIN
28
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
8
9
-
-
-
-
PLCC
PIN
32
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
8
9
HC55120, HC55121, HC55130, HC55140, HC55142, HC55143, HC55150
SOIC
PIN
28
10
14
11
12
13
16
17
18
19
15
20
21
22
23
24
28
25
26
27
8
9
-
-
-
-
(Continued)
RSYNC_REV
RDC_RAC
GKD_LVM
CRT_REV
SYMBOL
TRLY2
TRLY1
30
AGND
_LVM
CDC
ROH
SHD
VRX
SPM
V
V
ILIM
VTX
V
DR
RD
DT
C5
C4
C3
C2
C1
BH
CC
BL
High Battery Supply (negative with respect to GND).
Low Battery Supply (negative with respect to GND, magnitude ≤ V
Resistive Feed/Anti Clipping - Performs anti clipping function on constant current application and sets
the slope of the resistive feed curve for constant voltage applications.
Ring Trip, Soft Polarity Reversal and Line Voltage Measurement - A capacitor when placed between the
CRT_REV_LVM pin and +5V performs 3 mutually exclusive functions. When the SLIC is configured in the
Ringing mode it provides filtering of the ringing signal to prevent false detect. When the SLIC is transitioning
between the Forward Active State and Reverse Active State it provides Soft Polarity Reversal and performs
charge storage in the Line Voltage Measurement State. Recommended value 0.47µF.
Filter Capacitor - The CDC Capacitor removes the VF signals from the battery feed control loop.
Tip side of Ring Trip Detector - Ring trip detection is accomplished by connecting an external network
to a detector in the SLIC with inputs DT and DR. Ring trip occurs when the voltage on DT is more
negative than the voltage on DR.
Ring Side of Ring Trip Detector - Ring trip detection is accomplished by connecting an external
network to a detector in the SLIC with inputs DT and DR. Ring trip occurs when the voltage on DR is
more positive than the voltage on DT.
Activates Test Relay TRLY2. TTL Compatible Logic Input. C5 input high, test relay TRLT2 Low(ON).
C5 input floating, test relay TRLY2 High(OFF). This is due to an internal 100kΩ pull down resistor.
Activates Test Relay TRLY1. TTL Compatible Logic Input. C4 input high, test relay TRLT1 Low(ON).
C4 input floating, test relay TRLY1 High(OFF). This is due to an internal 100kΩ pull down resistor.
TTL Compatible Logic Input. The logic states of C1, C2 and C3 determine the operating states of the
SLIC. Reference Table 1 for details.
TTL Compatible Logic Input. The logic states of C1, C2 and C3 determine the operating states of the
SLIC. Reference Table 1 for details.
TTL Compatible Logic Input. The logic states of C1, C2 and C3 determine the operating states of the
SLIC. Reference Table 1 for details.
Switch Hook Detect - Active during off hook, ground key and loopback. Reference Table 1 for details.
Ground Key Detector and Line Voltage Measurement - Reference Table 1 for details.
5V Supply.
Loop Current Threshold Programming Pin - A resistor between this pin and ground will determine the
trigger level for the loop current detect circuit. See Equation 7.
Off Hook Overload Setting Resistor - Used to set combined overhead for voice and pulse metering
signals. See Equation 10.
Current Limit Programming Pin - A resistor between this pin and ground will determine the constant
current limit of the feed curve. See Equation 11.
Ring Synchronization Input and Reversal Time Setting. A resistor between this pin and GND
determines the polarity reversal time. Synchronization of the closing of the relay at zero voltage is
achieved via a ring sync pulse (5V to 0V) synchronized to the ring signal zero voltage crossing
(Reference Figure 18).
Analog ground
Receive Input - Ground referenced 4-wire side.
Pulse Metering Signal Input. If pulse metering is not used, then this pin should be grounded as close
to the device pin as possible. Input impedance to ground = 125kΩ.
Transmit Output - Ground referenced 4-wire side.
Test Relay Driver 2. Open Collector Transistor. Internal Clamp between it’s output and ground
elimnates the need to place an external snubber diode across Test Relay Driver. TRLY2 may be
connected to maximum of 14V.
Test Relay Driver 1. Open Collector Transistor. Internal Clamp between it’s output and ground
elimnates the need to place an external snubber diode across Test Relay Driver. TRLY1 may be
connected to maximum of 14V.
DESCRIPTION
BH
).
June 1, 2006
FN4659.13