SI3210M-E-GMR Silicon Laboratories Inc, SI3210M-E-GMR Datasheet - Page 83

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SI3210M-E-GMR

Manufacturer Part Number
SI3210M-E-GMR
Description
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of SI3210M-E-GMR

Lead Free Status / RoHS Status
Supplier Unconfirmed
Register 30. Indirect Address
Reset settings = xxxx_xxxx
Register 31. Indirect Address Status
Reset settings = 0000_0000
Name
Name
Bit
7:0
Bit
7:1
Type
Type
0
Bit
Bit
Reserved
IAA[7:0]
Name
Name
IAS
D7
D7
Indirect Address Access.
A write to IDA followed by a write to IAA will place the contents of IDA into an indirect
register at the location referenced by IAA at the next indirect register update (16 kHz
update rate—a write operation). Writing IAA only will load IDA with the value stored at
IAA at the next indirect memory update (a read operation).
Read returns zero.
Indirect Access Status.
0 = No indirect memory access pending.
1 = Indirect memory access pending.
D6
D6
D5
D5
Rev. 1.45
D4
D4
IAA[7:0]
R/W
Function
Function
D3
D3
D2
D2
Si3210/Si3211
D1
D1
IAS
D0
D0
R
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