SI3215-C-GMR Silicon Laboratories Inc, SI3215-C-GMR Datasheet - Page 38

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SI3215-C-GMR

Manufacturer Part Number
SI3215-C-GMR
Description
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of SI3215-C-GMR

Lead Free Status / RoHS Status
Compliant
Si3215
where β is the minimum expected current gain of
transistors Q5 and Q6.
The minimum value for V
following:
The ProSLIC is designed to create a fully balanced
ringing waveform, meaning that the TIP and RING
common mode voltage, (V
voltage
automatically set to the following:
V
by the ringing waveform with respect to the V
The value is set as a 4-bit setting in indirect Register 27
with an LSB voltage of 1.5 V/LSB. Register 27 should
be set with the calculated V
headroom during ringing.
The ProSLIC has a mode to briefly increase the
maximum differential current limit between the voltage
transition of TIP and RING from ringing to a dc linefeed
state. This mode is enabled by setting ILIMEN = 1
(direct Register 108, bit 7).
38
CMR
LCS
is an indirect register that provides the headroom
V
OVR
is
VBATH
VCM_RING
Processor
=
referred
Signal
Input
I
LOAD,PK
LFS
=
V
AC,PK
=
ISP_OUT
×
to
BATH
β
------------ -
VBATH VCMR
--------------------------------------------- -
TIP
+
β
+
as
1
V
is, therefore, given by the
+ V
×
ROFF
OVR
(
80.6 Ω
2
VCM_RING
RING
Digital
NRTP
+
LPF
to provide voltage
V
)/2, is fixed. This
OVR
+
1 V
Figure 21. Ring Trip Detector
)
Threshold
Ring Trip
BATH
RPTP
and
rail.
Rev. 0.92
+
is
2.5.6. Ring Trip Detection
A ring trip event signals that the terminal equipment has
gone off-hook during the ringing state. The ProSLIC
performs ring trip detection digitally using its on-chip
A/D converter. The functional blocks required to
implement ring trip detection are shown in Figure 21.
The primary input to the system is the loop current
sense (LCS) value provided by the current monitoring
circuitry and reported in direct Register 79. LCS data is
processed by the input signal processor when the
ProSLIC is in the ringing state as indicated by the
Linefeed Shadow register (direct Register 64). The data
then feeds into a programmable digital low-pass filter,
which removes unwanted ac signal components before
threshold detection.
The output of the low-pass filter is compared to a
programmable threshold, RPTP (indirect Register 16).
The threshold comparator output feeds a programmable
debouncing filter. The output of the debouncing filter
remains in its present state unless the input remains in
the opposite state for the entire period of time
programmed by the ring trip debounce interval,
RTDI[6:0] (direct Register 70). If the debounce interval
has been satisfied, the RTP bit of direct Register 68 will
be set to indicate that a valid ring trip has occurred. A
ring trip interrupt is generated if enabled by the RTIE bit
(direct Register 22). Table 29 lists the registers that
must be written or monitored to correctly detect a ring
trip condition.
The recommended values for RPTP, NRTP, and RTDI
vary according to the programmed ringing frequency.
Register values for various ringing frequencies are
given in Table 30.
DBIRAW
Debounce
Filter
RTDI
RTP
Interrupt
Logic
RTIE
RTIP

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