SI3208-B-GM Silicon Laboratories Inc, SI3208-B-GM Datasheet

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SI3208-B-GM

Manufacturer Part Number
SI3208-B-GM
Description
IC PROSLIC LINE FEED 125V 40QFN
Manufacturer
Silicon Laboratories Inc
Series
ProSLIC®r
Datasheets

Specifications of SI3208-B-GM

On-hook Transmission
Yes
Polarity Reversal
Yes
On-chip Ring Relay Driver
No
Longitudinal Balanced
60
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
TQFP
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Function
Subscriber Line Interface Concept (SLIC)
Interface
GCI, PCM, SPI
Number Of Circuits
2
Voltage - Supply
3.3V
Current - Supply
*
Power (watts)
*
Operating Temperature
*
Mounting Type
*
Package / Case
*
Includes
*
Lead Free Status / RoHS Status
Compliant
D
Features
Applications
Description
The Dual ProSLIC
SLIC and CODEC functionality into a single IC. In combination with a linefeed IC
(LFIC), they provide a complete two-channel analog telephone interface in
accordance with all relevant LSSGR, ITU, and ETSI specifications. The Dual
ProSLIC devices (Si3226/7) operate from a single 3.3 V supply and interface to
standard PCM/SPI or GCI bus digital interfaces. The LFICs (Si3208/9) perform all
high-voltage functions and operate from a 3.3 V supply as well as high-voltage
battery supplies. The Si3208 is rated for –110 V, and the Si3209 is rated for –
135 V. The Dual ProSLIC devices are available in a 64-pin thin quad flat package
(TQFP), and the LFICs are available in a 40-pin, quad flat no-lead package
(QFN).
Functional Block Diagram
Preliminary Rev. 0.33 6/07
FSYNC
FSYNC
Performs all BORSCHT functions
Ideal for short- or long-loop applications
Internal balanced or unbalanced ringing
Low power consumption
Software-programmable parameters:
Integrated dc-dc controller
Wideband CODEC (Si3227)
Customer Premises Equipment (CPE)
Optical Network Terminals (ONT)
U A L
SCLK
SCLK
PCLK
PCLK
DRX
DRX
SDO
SDO
DTX
DTX
RST
RST
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
SDI
SDI
INT
INT
CS
CS
cadence, and waveshape
Ringing frequency, amplitude,
Two-wire ac impedance
Transhybrid balance
DC current loop feed (10–45 mA)
Loop closure and ring trip thresholds
Ground key detect threshold
Interface
Interface
Interface
Interface
Control
Control
P
PCM/
PCM/
PLL
PLL
GCI
GCI
SPI
SPI
R O
®
VDC
VDC
is a family of low-voltage CMOS devices that integrate both
DC-DC Controllers
S LI C
Tone Gen
Tone Gen
Generator
Generator
DC-DC Controller
Caller ID
Caller ID
DTMF &
DTMF &
Ringing
Ringing
Line Diagnostics
Line Diagnostics
DC-DC BOM
DC-DC BOM
Si3226
Si3226/7
DSP
DSP
®
W I T H
VBAT
VBAT
Copyright © 2007 by Silicon Laboratories
CODEC
CODEC
CODEC
CODEC
CODEC
CODEC
ADC
ADC
ADC
DAC
DAC
DAC
ADC
ADC
ADC
DAC
DAC
DAC
Low-power sleep mode
On-hook transmission
Loop or ground start operation
Smooth polarity reversal
DTMF generator/decoder
A-Law/µ-Law companding,
linear PCM
PCM and SPI bus digital interfaces
with programmable interrupts
GCI/IOM-2 mode support
3.3 V operation
GR-909 loop diagnostics
Audio diagnostics with loopback
Pb-free/RoHS-compliant packaging
Private Branch Exchange (PBX)
Cable EMTAs, ATAs, VoIP
Gateways
DC-DC C
Linefeed
Linefeed
Linefeed
Linefeed
Linefeed
Linefeed
Linefeed
Linefeed
SLIC
SLIC
Control
Control
Monitor
Monitor
SLIC
SLIC
Control
Control
Monitor
Monitor
Si3206
Si3208/9
Channel 1
Channel 1
Channel 2
Channel 2
TIP
TIP
RING
RING
TIP
TIP
RING
RING
O N T R O L L E R
Ordering Information
Patents pending
Si3226/7
Si3208/9
See page 33.
Si3226/7 Si3208/9

Related parts for SI3208-B-GM

SI3208-B-GM Summary of contents

Page 1

... PCM/SPI or GCI bus digital interfaces. The LFICs (Si3208/9) perform all high-voltage functions and operate from a 3.3 V supply as well as high-voltage battery supplies. The Si3208 is rated for –110 V, and the Si3209 is rated for – 135 V. The Dual ProSLIC devices are available in a 64-pin thin quad flat package (TQFP), and the LFICs are available in a 40-pin, quad flat no-lead package (QFN) ...

Page 2

... Si3208/9 2 Preliminary Rev. 0.33 ...

Page 3

... SPI Control Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 4.18. PCM Interface and Companding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 4.19. General Circuit Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 4.20. Metallic Loop Testing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 5. Pin Descriptions: Si3226 Pin Descriptions: Si3208 Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 8. Package Outline: 64-Pin TQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34 9. Package Outline: 40-Pin QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37 Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38 Preliminary Rev ...

Page 4

... Operation of the Si3226 or Si3227 above 125 °C junction temperature may degrade device reliability. 4. Si3208 and Si3209 are equipped with on-chip thermal limiting circuitry that shuts down the circuit when the junction temperature exceeds the thermal shutdown threshold. The thermal shutdown threshold should normally be set to 145 ° ...

Page 5

... Forward/Reverse OHT, On-hook Current Tip/Ring Open, On-hook Current Ringing Current Notes: 1. All specifications are for a single channel of Si3226/7 using Si3208/9 linefeed IC and based on measurements with all channels in the same operating state the dc current in the subscriber loop during the off-hook state. LOOP 3. I ...

Page 6

... Si3208/9 Table 4. AC Characteristics (V = 3. °C for F-Grade, – °C for G-Grade Parameter Overload Level Overload Compression 1 Single Frequency Distortion Signal-to-(Noise + Distortion) 2 Ratio Audio Tone Generator Signal-to- 2 Distortion Ratio Intermodulation Distortion 2 Gain Accuracy Attenuation Distortion vs. Freq. Group Delay vs. Frequency ...

Page 7

... Hz to 3.4 kHz at TIP or RING Active off-hook 200 Hz to 3.4 kHz Differential Common Mode Differential + Common Mode – Assumes ideal line impedance matching. RING = 600 Ω 600 Ω synthesized using RS register L S Preliminary Rev. 0.33 Si3208/9 Min Typ Max Unit 58 60 — — — ...

Page 8

... Si3208/9 Table 5. Linefeed Characteristics (V = 3. °C for F-Grade, – °C for G-Grade Parameter Symbol Maximum Loop Resistance R LOOP DC Loop Current Accuracy DC Open Circuit Voltage Accuracy DC Differential Output R Resistance DC On-Hook Voltage V OHTO Accuracy—Ground Start DC Output R ROTO Resistance—Ground Start DC Output Resistance— ...

Page 9

... F-Grade, – °C for G-Grade Parameter Symbol Differential Nonlinearity DNLE (8-bit resolution) Integral Nonlinearity INLE (8-bit resolution) Gain Error Table 7. Si3208/Si3209 Characteristics (V = 3. –15 to –130 BAT Parameter TIP/RING Pull-down Transistor Saturation Voltage TIP/RING Pull-up Transistor Saturation Voltage OPEN State TIP/RING Leakage Current ...

Page 10

... Si3208/9 Table 8. DC Characteristics (V = 3. °C for F-Grade, – °C for G-Grade Parameter Symbol High Level Input Voltage V IH Low Level Input Voltage V IL High Level Output V OH Voltage Low Level Output V OL Voltage SDITHRU internal pullup resistance Relay Driver Source ...

Page 11

... SDO SDITHRU L Symbol Test Conditions su1 su2 su2 Figure 1. SPI Timing Diagram Preliminary Rev. 0.33 Si3208 pF) Min Typ Max Unit 62 — — ns — — — — — — — — — — — — — — — — — — ...

Page 12

... Si3208/9 Table 11. Switching Characteristics—PCM Highway Interface (V = 3. °C for F-Grade, – °C for G-Grade Parameter PCLK Period Valid PCLK Inputs 2 FSYNC Period PCLK Duty Cycle Tolerance FSYNC Jitter Tolerance Rise Time, PCLK Fall Time, PCLK Delay Time, PCLK Rise to DTX Active ...

Page 13

... Specification applies to PCLK fall to DTX tristate when that mode is selected Symbol Test Conditions dty t jitter su1 su2 wfs Preliminary Rev. 0.33 Si3208 Min Typ Max Units — 488 — ns — 244 — ns — 125 — µ — — ±120 ns — — — — — — — — — — 20 ...

Page 14

... Si3208/9 PCLK t su1 FSYNC Frame 0, DRX Bit 0 DTX Figure 3. GCI Highway Interface Timing Diagram (2.048 MHz PCLK Mode) PCLK t su1 FSYNC Frame 0, DRX Bit 0 DTX Figure 4. GCI Highway Interface Timing Diagram (4.096 MHz PCLK Mode su2 Frame 0, Bit su2 Frame 0, Bit 0 Preliminary Rev ...

Page 15

... Acceptable Figure 5. Transmit and Receive Path SNDR Fundamental 5 Output Power (dBm0 2 Fundamental Input Power (dBm0) Figure 6. Overload Compression Performance Preliminary Rev. 0.33 Acceptable Region Si3208 ...

Page 16

... Si3208/9 2. Typical Application Circuits VBRNG VBATa VBATb VBATb VBATa VBATa VCC VCC VDDREG VDDA VDDA VDDD VDDD VDDC VDDC SVDC GND GND 16 VBRNG VBRNG VBRNG EGND EGND VBAT VBATb VBAT Preliminary Rev. 0.33 GND GNDD GNDA ...

Page 17

... Preliminary Rev. 0.33 Si3208/9 17 ...

Page 18

... Si3208 Preliminary Rev. 0.33 ...

Page 19

... VDD VBATa VBAT_1 VBATb VBAT_2 Preliminary Rev. 0.33 Si3208/9 DGND AGND 19 ...

Page 20

... Si3208/9 20 Preliminary Rev. 0.33 ...

Page 21

... Preliminary Rev. 0.33 Si3208/9 21 ...

Page 22

... Si3208/9 22 Preliminary Rev. 0.33 ...

Page 23

... Preliminary Rev. 0.33 Si3208/9 23 ...

Page 24

... Si3208/9 24 Preliminary Rev. 0.33 ...

Page 25

... Digital voice data transfer occurs over a standard PCM bus. Control data is transferred using a standard SPI. The Si3226/7 is available in a 64-pin TQFP; the Si3208 is available in a 32-pin QFN, and the Si3209 is available in a 40-pin QFN or a 48-pin eTQFP. ...

Page 26

... Si3208/9 If the Si3226/7 detects a fault condition or overpower condition on any channel, it automatically sets that channel to the open state and generates a "power alarm" interrupt. The interrupt can be masked, but the automatic transition to open cannot be masked. The various power alarms and linefeed faults supporting automatic intervention are described below ...

Page 27

... Hz–3.4 kHz) audio codec. The Si3227 wideband mode provides an expanded audio band at a 16-bit, 16 kHz sample rate for enhanced audio quality while maintaining standard telephony audio compatibility. Wideband audio samples are transmitted and received on the PCM interface using two consecutive 8 kHz frames. Preliminary Rev. 0.33 Si3208/9 27 ...

Page 28

... Si3208/9 4.17. SPI Control Interface The controller interface to the Dual ProSLIC is a 4-wire interface modeled after microcontroller and serial peripheral devices. The interface consists of a clock (SCLK), chip select (CS), serial data input (SDI), and serial data output (SDO). In addition, the Dual ProSLIC ...

Page 29

... DC-DC Switch Driver Power Supply. O DC-DC Drive Output. I DC-DC Current Monitor Input-Low Terminal. I DC-DC Current Monitor Input-High Terminal. I/O DC-DC BJT Drive Monitor. GND Digital Ground. PWR Digital Supply Voltage. I PCM Bus Clock Input. O Line-Driver IC Clock Output. Preliminary Rev. 0.33 Si3208/9 Description 29 ...

Page 30

... Si3208/9 Table 17. Si3226/7 Pin Descriptions (Continued) Pin Symbol Number 33 DTXEN 34 DTX 35 DRX 36 INT 37 RST 38 VDDREG 39 GPIO1b / STIPCb / TRD1b 40 GPIO2b / SRINGCb / TRD2b 41 GPIO3b / PWROb 42 SVBATb 43 CAPMb 44 CAPPb 45 STIPDCb 46 STIPACb 47 SRINGACb 48 SRINGDCb 49 DRINGb 50 URINGb 51 DTIPb 52 UTIPb 53 IBIASb 54 CAPLB 55 IREF 56 QGND 57 GNDA 58 VDDA 59 ISNS ...

Page 31

... NC 28 RING_2 VBAT_2 Table 18. Si3208/9 Pin Descriptions I/O Internal connection; leave to float. No Connect. I/O Ring Channel 1 Input/Output. No Connect. I/O Tip Channel 1 Input/Output. No Connect. Internal connection; leave to float. I Negative Ring Current Control Channel 1 Input. I Positive Ring Current Control Channel 1 Input. I Negative Tip Current Control Channel 1 Input. ...

Page 32

... Si3208/9 Table 18. Si3208/9 Pin Descriptions (Continued) QFN Pin # Symbol AGND VBAT_1 40 IC epad 32 I/O Description No Connect. I Analog Ground. Internal connection; leave to float. Internal connection; leave to float. I Operating Battery Voltage Channel 1 Input. Internal connection; leave to float. Exposed Die Attach Paddle. For adequate thermal management, the exposed die paddle ...

Page 33

... Add the end of the device to denote tape and reel options. Wideband Package Audio No TQFP-64 No TQFP-64 Yes TQFP-64 Yes TQFP-64 — QFN-40 — QFN-40 — QFN-40 — QFN-40 Preliminary Rev. 0.33 Si3208/9 Temp Range °C – ° °C – ° °C – ° °C – °C 33 ...

Page 34

... Si3208/9 8. Package Outline: 64-Pin TQFP Figure 12 illustrates the package details for the Si3226/7. Table 19 lists the values for the dimensions shown in the illustration. Figure 12. 64-Pin Thin Quad Flat Package (TQFP) 34 Preliminary Rev. 0.33 ...

Page 35

... All dimensions shown are in millimeters (mm) unless otherwise noted. 2. Dimensioning and tolerancing per ANSI Y14.5M-1994. 3. This package outline conforms to JEDEC MS-026, variant ACD. 4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020C specification for small body components. Preliminary Rev. 0.33 Si3208/9 Nom Max — 1.20 — ...

Page 36

... Si3208/9 9. Package Outline: 40-Pin QFN Figure 13 illustrates the package details for the Si3208/9. Table 20 lists the values for the dimensions shown in the illustration. Table 20. 40-Pin QFN Package Dimensions Dimension Min Nom A 0.80 0.90 A1 0.00 0.02 b 0.18 0.25 D 6.00 BSC. D2 4.10 4. ...

Page 37

... HANGE IST Revision 0.2 to Revision 0.32 Added Si3208 and Si3209. Removed Si3203, Si3205, and Si3206. Added pin-outs and package drawings for Si3208 and Si3209. Updated pin-out for Si3226. Updated bill of materials. Updated “2. Typical Application Circuits” and added dc-dc converter schematics. ...

Page 38

... Si3208 ONTACT NFORMATION Silicon Laboratories Inc. 400 West Cesar Chavez Austin, TX 78701 Tel: 1+(512) 416-8500 Fax: 1+(512) 416-9669 Toll Free: 1+(877) 444-3032 Email: ProSLICinfo@silabs.com Internet: www.silabs.com The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. ...

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