L80223 LSI, L80223 Datasheet - Page 96

• Manufacturer Part Number: L80223
• Manufacturer: LSI

Specifications of L80223

• Lead Free Status / RoHS Status: Not Compliant

Table 6.7
1. Setup time measured with 5 pF loading on TXC. Additional leading will create delay on TXC rise
6-8
Sym
t11
t12
t13
t14
t15
t16
t17
t18
t19
t20
t21
t22
t23
t24
t25
t26
t27
t28
time which will require increased setup times.
Parameter
TX_CLK Period
TX_CLK Low Time
TX_CLK High Time
TX_CLK Rise/Fall Time
TX_EN Setup Time
TX_EN Hold Time
CRS During Transmit Assert Time
CRS During Transmit
Time
TXD Setup Time
TXD Hold Time
TX_ER Setup Time
TX_ER Hold Time
Transmit Propagation Delay
Transmit Output Jitter
Transmit SOI Pulse Width To 0.3 V
Transmit SOI Pulse Width to 40 mV
PLEDn Delay Time
PLEDn Pulse Width
Transmit Timing
Specifications
Deassert
Copyright © 2000, 2001, 2002 by LSI Logic Corporation. All rights reserved.
39.996
399.96 400 400.04
Min
160
160
250
16
16
15
15
15
60
80
0
0
0
Limit
Typ
200
200
40
20
20
40.004
4500
Max
240
240
400
160
900
140
600
105
24
24
10
40
25
0.7
5.5
ns pk-pk
ns pk-pk 10 Mbits/s
Unit
ms
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
100 Mbits/s
10 Mbits/s
100 Mbits/s
10 Mbits/s
100 Mbits/s
10 Mbits/s
Note
100 Mbits/s
10 Mbits/s
100 Mbits/s
10 Mbits/s
Note 1
Note 1
100 Mbits/s, MII
10 Mbits/s
100 Mbits/s
10 Mbits/s
10 Mbits/s
PLEDn programmed
for activity
PLEDn programmed
for activity
Conditions
1