82V2088DRG IDT, Integrated Device Technology Inc, 82V2088DRG Datasheet - Page 13

• Manufacturer Part Number: 82V2088DRG
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 82V2088DRG

• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Compliant

OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT
Table-1 Pin Description (Continued)
SDI/R/W/WR
DS/RD
Name
SDO
RST
REF
THZ
INT
D7
D6
D5
D4
D3
D2
D1
D0
A7
A6
A5
A4
A3
A2
A1
A0
Output
Output
Input
Input
Input
Input
Input
Input
Type
I / O
PQFP208
47
48
49
50
24
25
26
27
28
29
30
31
37
38
39
40
41
42
43
44
51
10
59
Pin No.
PBGA208
M4
M3
M2
M1
N3
P1
P2
R1
H3
H2
K3
K2
L1
L2
L3
L4
P3
E4
T1
J1
J2
J3
J4
DS: Data Strobe
In parallel Motorola microcontroller interface mode, signal on this pin is the data strobe of the parallel
interface. During a write operation (R/W =0), data on D[7:0] is sampled into the device. During a read
operation (R/W =1), data is output to D[7:0] from the device.
RD: Read Operation
In parallel Intel microcontroller interface mode, this pin is asserted low by the microcontroller to initiate
a read cycle. Data is output to D[7:0] from the device during a read operation.
SDI: Serial Data Input
In serial microcontroller interface mode, data is input on this pin. Input data is sampled on the rising
edges of SCLK.
R/W: Read/Write Select
In parallel Motorola microcontroller interface mode, this pin is low for write operation and high for read
operation.
WR: Write Operation
In parallel Intel microcontroller interface mode, this pin is asserted low by the microcontroller to initiate
a write cycle. Data on D[7:0] is sampled into the device during a write operation.
SDO: Serial Data Output
In serial microcontroller interface mode, signal on this pin is the output data of the serial interface. Con-
figuration and status data on pin SDO is clocked out of the device on the active edge of SCLK.
INT: Interrupt Request
This pin outputs the general interrupt request for all interrupt sources. If INTM_GLB bit (GCF0, 40H)
is set to ‘1’, all interrupt sources will be masked. And these interrupt sources also can be masked indi-
vidually via registers (INTM0, 11H) and (INTM1, 12H). Interrupt status is reported via byte INT_CH
(INTCH, 80H), registers (INTS0, 16H) and (INTS1, 17H).
Output characteristics of this pin can be defined to be push-pull (active high or low) or be open-drain
(active low) by bits INT_PIN[1:0] (GCF0, 40H).
Dn: Data Bus 7~0
These pins function as a bi-directional data bus of the microcontroller interface.
An: Address Bus 7~0
These pins function as an address bus of the microcontroller interface.
RST: Hardware Reset
The chip is reset if a low signal is applied on this pin for more than 100ns. All the drivers output are in
high impedance state, all the internal flip-flops are reset and all the registers are initialized to their
default values.
THZ: Transmit Driver Enable
This pin enables or disables all transmitter drivers on a global basis. A low level on this pin enables the
drivers while a high level turns all drivers into high impedance state. Note that functionality of internal
circuits is not affected by signal on this pin.
REF: Reference Resistor
An external resistor (3 KΩ, 1%) is used to connect this pin to ground to provide a standard reference
current for internal circuit.
13
Description
TEMPERATURE RANGES
INDUSTRIAL