SJA1000/N1 NXP Semiconductors, SJA1000/N1 Datasheet - Page 11

• Manufacturer Part Number: SJA1000/N1
• Manufacturer: NXP Semiconductors

Specifications of SJA1000/N1

• Data Rate: 1000Kbps
• Number Of Transceivers: 1
• Power Down Mode: Sleep
• Standard Supported: CAN 2.0B
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.5V
• Package Type: PDIP
• Supply Current: 15mA
• Operating Temperature (max): 125C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Automotive
• Mounting: Through Hole
• Pin Count: 28
• Lead Free Status / RoHS Status: Compliant

Philips Semiconductors
2000 Jan 04
Acceptance code
Acceptance mask
Bus timing 0
Bus timing 1
Output control
Transmit buffer
Receive buffer
Clock divider
Stand-alone CAN controller
REGISTER
AC.7 to 0
AM.7 to 0
BTR0.7
BTR0.6
BTR0.5
BTR0.4
BTR0.3
BTR0.2
BTR0.1
BTR0.0
BTR1.7
BTR1.6
BTR1.5
BTR1.4
BTR1.3
BTR1.2
BTR1.1
BTR1.0
OC.7
OC.6
OC.5
OC.4
OC.3
OC.2
OC.1
OC.0
BIT
SJW.0
BRP.5
BRP.4
BRP.3
BRP.2
BRP.1
BRP.0
TSEG2.2
TSEG2.1
TSEG2.0
TSEG1.3
TSEG1.2
TSEG1.1
TSEG1.0
OCTN1
OCPOL1
OCTP0
OCTN0
OCPOL0
OCMODE1 Output Control Mode 1
OCMODE0 Output Control Mode 0
TXB
RXB
CDR
AC
AM
SJW.1
SAM
OCTP1
SYMBOL
Acceptance Code
Acceptance Mask
Synchronization Jump Width 1
Synchronization Jump Width 0
Baud Rate Prescaler 5
Baud Rate Prescaler 4
Baud Rate Prescaler 3
Baud Rate Prescaler 2
Baud Rate Prescaler 1
Baud Rate Prescaler 0
Sampling
Time Segment 2.2
Time Segment 2.1
Time Segment 2.0
Time Segment 1.3
Time Segment 1.2
Time Segment 1.1
Time Segment 1.0
Output Control Transistor P1
Output Control Transistor N1
Output Control Polarity 1
Output Control Transistor P0
Output Control Transistor N0
Output Control Polarity 0
Transmit Buffer
Receive Buffer
Clock Divider Register
11
NAME
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X; note 5
00000000
(Intel);
00000101
(Motorola)
HARDWARE
RESET BY
VALUE
Product specification
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X; note 5
X
SOFTWARE OR
SJA1000
BIT CR.0 BY
BUS-OFF
SETTING
DUE TO