ICS85314AGI-11 IDT, Integrated Device Technology Inc, ICS85314AGI-11 Datasheet - Page 2

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ICS85314AGI-11

Manufacturer Part Number
ICS85314AGI-11
Description
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Driverr
Datasheet

Specifications of ICS85314AGI-11

Number Of Clock Inputs
2
Mode Of Operation
Differential
Output Frequency
700MHz
Output Logic Level
LVPECL
Operating Supply Voltage (min)
2.375V
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.8V
Package Type
TSSOP
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
20
Lead Free Status / RoHS Status
Not Compliant
ICS85314I-11 Data Sheet
Table 1. Pin Descriptions
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
ICS85314AGI-11 REVISION E MAY 4, 2010
Symbol
C
R
R
Number
IN
PULLUP
PULLDOWN
18, 20
9, 10
1, 2
3, 4
5, 6
7, 8
11
12
13
14
15
16
17
19
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
RESERVED
CLK_SEL
nCLK_EN
Q0, nQ0
Q1, nQ1
Q2, nQ2
Q3, nQ3
Q4, nQ4
nCLK0
nCLK1
Name
CLK0
CLK1
V
V
CC
EE
Reserve
Output
Output
Output
Output
Output
Power
Power
Input
Input
Input
Input
Input
Input
Type
Pulldown
Pulldown
Pulldown
Pulldown
Pullup
Pullup
Test Conditions
Description
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Negative supply pin.
Clock select input. When HIGH, selects CLK1, nCLK1 inputs. When LOW,
selects CLK0, nCLK0 inputs. LVTTL / LVCMOS interface levels.
Non-inverting differential clock input.
Inverting differential clock input.
Reserved pin.
Non-inverting differential clock input.
Inverting differential clock input.
Positive supply pins.
Synchronizing clock enable. When LOW, clock outputs follow clock input. When
HIGH, Q outputs are forced low, nQ outputs are forced high.
LVTTL / LVCMOS interface levels.
2
LOW SKEW, 1-TO-5 DIFFERENTIAL-TO-2.5V, 3.3V LVPECL FANOUT BUFFER
Minimum
Typical
51
51
©2010 Integrated Device Technology, Inc.
4
Maximum
Units
k
k
pF

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