IDTMC100ES6014DT IDT, Integrated Device Technology Inc, IDTMC100ES6014DT Datasheet

IDTMC100ES6014DT

Manufacturer Part Number

IDTMC100ES6014DT

Description

Manufacturer

IDT, Integrated Device Technology Inc

Type

Clock Driverr

Datasheet

1.IDTMC100ES6014DT.pdf (8 pages)

Specifications of IDTMC100ES6014DT

Number Of Clock Inputs

Mode Of Operation

Differential

Output Frequency

2000MHz

Output Logic Level

ECL/PECL

Operating Supply Voltage (min)

-2.375/2.375V

Operating Supply Voltage (typ)

-2.5/-3.3/2.5/3.3V

Operating Supply Voltage (max)

-3.8/3.8V

Package Type

TSSOP

Operating Temp Range

-40C to 85C

Operating Temperature Classification

Industrial

Signal Type

ECL/HSTL/LVDS/PECL

Mounting

Surface Mount

Pin Count

Lead Free Status / RoHS Status

Not Compliant

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IDT™ 2.5 V/3.3 V 1:5 Differential ECL/PECL/HSTL/LVDS Clock Driver

Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc

2.5 V/3.3 V 1:5 Differential

ECL/PECL/HSTL/LVDS Clock Driver

Freescale Semiconductor

Technical Data

2.5 V/3.3 V 1:5 Differential

ECL/PECL/HSTL/LVDS Clock Driver

distribution in mind, accepting two clock sources into an input multiplexer. The

ECL/PECL input signals can be either differential or single-ended (if the V

output is used). HSTL and LVDS inputs can be used when the ES6014 is

operating under PECL conditions.

design, layout, and processing minimize skew within a device and from device to

device.

differential output need to be terminated identically into 50 Ω even if only one

output is being used. If an output pair is unused, both outputs may be left open

(unterminated) without affecting skew.

LOW state. This avoids a runt clock pulse when the device is enabled/disabled

as can happen with an asynchronous control. The internal flip flop is clocked on

the falling edge of the input clock; therefore, all associated specification limits are

referenced to the negative edge of the clock input.

positive V

performance clock distribution in +3.3 V or +2.5 V systems. Single ended CLK

input pin operation is limited to a V

ECL mode. Designers can take advantage of the ES6014's performance to

distribute low skew clocks across the backplane or the board.

Features

•

The MC100ES6014 is a low skew 1-to-5 differential driver, designed with clock

The ES6014 specifically guarantees low output-to-output skew. Optimal

To ensure that the tight skew specification is realized, both sides of any

The common enable (EN) is synchronous, outputs are enabled/disabled in the

The MC100ES6014, as with most other ECL devices, can be operated from a

25 ps Within Device Skew

400 ps Typical Propagation Delay

Maximum Frequency > 2 GHz Typical

The 100 Series Contains Temperature Compensation

PECL and HSTL Mode: V

ECL Mode: V

LVDS and HSTL Input Compatible

Open Input Default State

20-Lead Pb-Free Package Available

supply in PECL mode. This allows the ES6014 to be used for high

= 0 V with V

= 2.375 V to 3.8 V with V

= –2.375 V to –3.8 V

≥ 3.0 V in PECL mode, or V

= 0 V

≤ –3.0 V in

MC100ES6014DT

MC100ES6014DTR2

MC100ES6014EJ

MC100ES6014EJR2

ORDERING INFORMATION

MC100ES6014

Device

20-LEAD TSSOP PACKAGE

Pb-FREE PACKAGE

CASE 948E-03

DT SUFFIX

EJ SUFFIX

MC100ES6014

TSSOP-20 (Pb-Free)

DATA SHEET

MC100ES6014

Rev 4, 03/2006

TSSOP-20

Package

MC100ES6014

Related parts for IDTMC100ES6014DT

IDTMC100ES6014DT Summary of contents

Page 1

Freescale Semiconductor Technical Data 2.5 V/3.3 V 1:5 Differential 2.5 V/3.3 V 1:5 Differential ECL/PECL/HSTL/LVDS Clock Driver ECL/PECL/HSTL/LVDS Clock Driver The MC100ES6014 is a low skew 1-to-5 differential driver, designed with clock distribution in mind, accepting two clock sources into ...

Page 2

MC100ES6014 2.5 V/3.3 V 1:5 Differential ECL/PECL/HSTL/LVDS Clock Driver Table 1. Pin Description Pin CLK0*, CLK0** ECL/PECL/HSTL CLK Input CLK1*, CLK1** ECL/PECL/HSTL CLK Input Q0:4, Q0:4 ECL/PECL Outputs CLK_SEL* ECL/PECL Active Clock Select Input EN* ...

Page 3

MC100ES6014 2.5 V/3.3 V 1:5 Differential ECL/PECL/HSTL/LVDS Clock Driver Table 4. Absolute Maximum Ratings Symbol Characteristic V Power Supply Voltage SUPPLY V Input Voltage IN I Output Current OUT I V Sink/Source Current Operating Temperature Range A ...

Page 4

MC100ES6014 2.5 V/3.3 V 1:5 Differential ECL/PECL/HSTL/LVDS Clock Driver Table 7. AC Characteristics (V CC Symbol Characteristics f Maximum Output Frequency max t Propagation Delay (Differential) PLH t CLK PHL (2) t Within Device Skew SKEW (2) ...

Page 5

MC100ES6014 2.5 V/3.3 V 1:5 Differential ECL/PECL/HSTL/LVDS Clock Driver IDT™ 2.5 V/3.3 V 1:5 Differential ECL/PECL/HSTL/LVDS Clock Driver Advanced Clock Drivers Device Data Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc Freescale Semiconductor PACKAGE DIMENSIONS CASE ...

Page 6

MC100ES6014 2.5 V/3.3 V 1:5 Differential ECL/PECL/HSTL/LVDS Clock Driver MC100ES6014 IDT™ 2.5 V/3.3 V 1:5 Differential ECL/PECL/HSTL/LVDS Clock Driver Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc 6 PACKAGE DIMENSIONS CASE 948E-03 ISSUE B 20-LEAD TSSOP ...

Page 7

Page 8

MPC92459 MC100ES6014 PART NUMBERS 900 MHz Low Voltage LVDS Clock Synthesizer 2.5 V/3.3 V 1:5 Differential ECL/PECL/HSTL/LVDS Clock Driver INSERT PRODUCT NAME AND DOCUMENT TITLE Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: ...

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