IMIB9948CAX Cypress Semiconductor Corp, IMIB9948CAX Datasheet

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IMIB9948CAX

Manufacturer Part Number
IMIB9948CAX
Description
Manufacturer
Cypress Semiconductor Corp
Type
Clock Driverr
Datasheet

Specifications of IMIB9948CAX

Number Of Clock Inputs
2
Operating Supply Voltage (min)
2.97V
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.63V
Package Type
TQFP
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Signal Type
LVCMOS/LVPECL/LVTTL
Mounting
Surface Mount
Pin Count
32
Quiescent Current
2mA
Lead Free Status / RoHS Status
Compliant
Cypress Semiconductor Corporation
Document #: 38-07079 Rev. *D
Features
Block Diagram
• 160-MHz clock support
• LVPECL or LVCMOS/LVTTL clock input
• LVCMOS/LVTTL compatible inputs
• 12 clock outputs: drive up to 24 clock lines
• Synchronous Output Enable
• Output three-state control
• 350-ps maximum output-to-output skew
• Pin compatible with MPC948
• Industrial temp. range: –40°C to +85°C
• 32-pin TQFP package
PECL_CLK#
PECL_CLK
TCLK_SEL
SYNC_OE
TCLK
TS#
0
1
VDD
3.3V, 160-MHz, 1:12 Clock Distribution Buffer
3901 North First Street
VDDC
12
Q0-Q11
Description
The B9948 is a low-voltage clock distribution buffer with the
capability to select either a differential LVPECL or a LVC-
MOS/LVTTL compatible input clock. The two clock sources
can be used to provide for a test clock as well as the primary
system clock. All other control inputs are LVCMOS/LVTTL
compatible. The twelve outputs are 3.3V LVCMOS or LVTTL
compatible and can drive two series terminated 50 transmis-
sion lines. With this capability the B9948 has an effective
fan-out of 1:24. The outputs can also be three-stated via the
three-state input TS#. Low output-to-output skews make the
B9948 an ideal clock distribution buffer for nested clock trees
in the most demanding of synchronous systems.
The B9948 also provides a synchronous output enable input
for enabling or disabling the output clocks. Since this input is
internally synchronized to the input clock, potential output
glitching or runt pulse generation is eliminated.
Pin Configuration
PECL_CLK#
PECL_CLK
TCLK_SEL
SYNC_OE
San Jose
TCLK
VDD
VSS
TS#
1
2
3
4
5
6
7
8
B9948
CA 95134
Revised December 14, 2002
24
23
22
21
20
19
18
17
408-943-2600
VSS
Q4
VDDC
Q5
VSS
Q6
VDDC
Q7
B9948
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IMIB9948CAX Summary of contents

Page 1

... PECL_CLK# 1 TCLK TCLK_SEL SYNC_OE TS# Cypress Semiconductor Corporation Document #: 38-07079 Rev. *D Description The B9948 is a low-voltage clock distribution buffer with the capability to select either a differential LVPECL or a LVC- MOS/LVTTL compatible input clock. The two clock sources can be used to provide for a test clock as well as the primary system clock ...

Page 2

Pin Description Pin Name 3 PECL_CLK 4 PECL_CLK# 2 TCLK 9, 11, 13, 15, 17, 19, Q(11:0) 21, 23, 25, 27, 29 TCLK_SEL 5 SYNC_OE 6 TS# 10, 14, 18, 22, 26, VDDC 30 7 VDD 8, ...

Page 3

Maximum Ratings Maximum Input Voltage Relative ............ V SS Maximum Input Voltage Relative ............. V DD Storage Temperature: ................................– 150 C Operating Temperature: .................................-40°C to +85°C Maximum ESD Protection.............................................. 2 ...

Page 4

AC Parameters : V = 3.3V ±10%, V DDC Parameter Description Fmax Maximum Input Frequency [[7]] Tpd PECL_CLK to Q Delay [[7]] TCLK to Q Delay [[7],[8]] FoutDC Output Duty Cycle tpZL, tpZH Output enable time (all outputs) tpLZ, ...

Page 5

... Document #: 38-07079 Rev. *D © Cypress Semiconductor Corporation, 2002. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user ...

Page 6

Document History Page Document Title: B9948 3.3V, 160 MHz, 1:12 Clock Distribution Buffer Document Number: 38-07079 Issue Rev. ECN No. Date ** 107115 06/06/01 *A 108060 07/03/01 *B 109805 01/31/02 *C 118058 09/16/02 *D 122764 12/14/02 Document #: 38-07079 Rev. ...

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