MC100ES6221TB IDT, Integrated Device Technology Inc, MC100ES6221TB Datasheet

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MC100ES6221TB

Manufacturer Part Number
MC100ES6221TB
Description
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Driverr
Datasheet

Specifications of MC100ES6221TB

Number Of Clock Inputs
2
Mode Of Operation
Differential
Output Frequency
2000MHz
Output Logic Level
ECL/PECL
Operating Supply Voltage (min)
-2.375/2.375V
Operating Supply Voltage (typ)
-2.5/-3.3/2.5/3.3V
Operating Supply Voltage (max)
-3.465/3.465V
Package Type
TQFP EP
Operating Temp Range
0C to 110C
Operating Temperature Classification
Commercial
Signal Type
ECL/HSTL/PECL
Mounting
Surface Mount
Pin Count
52
Quiescent Current
160mA
Lead Free Status / RoHS Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC100ES6221TB
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
IDT™ Low Voltage 1:20 Differential ECL/PECL/HSTL Clock Fanout Buffer
Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc
Low Voltage 1:20 Differential ECL/PECL/HSTL Clock
Fanout Buffer
Freescale Semiconductor
Technical Data
© Freescale Semiconductor, Inc., 2005. All rights reserved.
Low Voltage 1:20 Differential
ECL/PECL/HSTL Clock Fanout Buffer
Designed for most demanding clock distribution systems, the MC100ES6221
supports various applications that require the distribution of precisely aligned
differential clock signals. Using SiGe technology and a fully differential
architecture, the device offers very low skew outputs and superior digital signal
characteristics. Target applications for this clock driver is high performance clock
distribution in computing, networking and telecommunication systems.
Features
Functional Description
supports clock frequencies up to 2 GHz. The device accepts two clock sources.
The CLK0 input can be driven by ECL or PECL compatible signals, the CLK1 input accepts HSTL compatible signals. The
selected input signal is distributed to 20 identical, differential ECL/PECL outputs. If V
and bypassed to GND by a 10 nF capacitor, the MC100ES6221 can be driven by single-ended ECL/PECL signals utilizing the
V
if only one output is used. In the case where not all ten outputs are used, the output pairs on the same package side as the parts
being used on that side should be terminated.
MC100ES6221 supports positive (PECL) and negative (ECL) supplies. The MC100ES6221 is pin and function compatible to the
MC100EP221.
BB
The MC100ES6221 is a bipolar monolithic differential clock fanout buffer.
The MC100ES6221 is designed for low skew clock distribution systems and
In order to meet the tight skew specification of the device, both outputs of a differential output pair should be terminated, even
The MC100ES6221 can be operated from a single 3.3 V or 2.5 V supply. As most other ECL compatible devices, the
characteristics
Pin and function compatible to the MC100EP221
52-lead Pb-free Package Available
1:20 differential clock fanout buffer
100 ps maximum device skew
SiGe technology
Supports DC to 2 GHz operation of clock or data signals
ECL/PECL compatible differential clock outputs
ECL/PECL/HSTL compatible differential clock inputs
Single 3.3 V, –3.3 V, 2.5 V or –2.5 V supply
Standard 52 lead LQFP package with exposed pad for enhanced thermal
Supports industrial temperature range
bias voltage output.
1
BB
1:20 DIFFERENTIAL ECL/PECL/HSTL
is connected to the CLK0 or CLK1 input
CLOCK FANOUT BUFFER
MC100ES6221
52-LEAD LQFP PACKAGE
LOW VOLTAGE DUAL
52-LEAD LQFP PACKAGE
Pb-FREE PACKAGE
CASE 1336A-01
CASE 1336A-01
EXPOSED PAD
AE SUFFIX
TB SUFFIX
MC100ES6221
DATA SHEET
MC100ES6221
Rev 5, 04/2005
MC100ES6221

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MC100ES6221TB Summary of contents

Page 1

Freescale Semiconductor Technical Data Low Voltage 1:20 Differential ECL/PECL/HSTL Clock Low Voltage 1:20 Differential Fanout Buffer ECL/PECL/HSTL Clock Fanout Buffer The MC100ES6221 is a bipolar monolithic differential clock fanout buffer. Designed for most demanding clock distribution systems, the MC100ES6221 supports ...

Page 2

MC100ES6221 Low Voltage 1:20 Differential ECL/PECL/HSTL Clock Fanout Buffer V CC CLK0 CLK0 CLK1 CLK1 V EE CLK_SEL V EE Figure 1. MC100ES6221 Logic Diagram Table 1. Pin Configuration Pin I/O CLK0, CLK0 Input ...

Page 3

MC100ES6221 Low Voltage 1:20 Differential ECL/PECL/HSTL Clock Fanout Buffer Table 3. Absolute Maximum Ratings Symbol Characteristics V Supply Voltage Input Voltage Output Voltage OUT I DC Input Current Output Current OUT ...

Page 4

MC100ES6221 Low Voltage 1:20 Differential ECL/PECL/HSTL Clock Fanout Buffer Table 5. PECL DC Characteristics (V Symbol Characteristics (1) Clock Input Pair CLK0, CLK0 (PECL differential signals) V Differential Input Voltage PP V Differential Cross Point Voltage CMR (1) I Input ...

Page 5

MC100ES6221 Low Voltage 1:20 Differential ECL/PECL/HSTL Clock Fanout Buffer Table 6. ECL DC Characteristics (V Symbol Characteristics Clock Input Pair CLK0, CLK0 (ECL differential signals) V Differential Input Voltage PP V Differential Cross Point Junction to top of CMR (2) ...

Page 6

MC100ES6221 Low Voltage 1:20 Differential ECL/PECL/HSTL Clock Fanout Buffer Table 7. AC Characteristics (ECL: V (PECL: V Symbol Characteristics Clock Input Pair CLK0, CLK0 (PECL or ECL differential signals) V Differential Input Voltage PP V Differential Input Crosspoint Voltage CMR ...

Page 7

MC100ES6221 Low Voltage 1:20 Differential ECL/PECL/HSTL Clock Fanout Buffer Differential Pulse Generator Ω Figure 4. MC100ES6221 AC Test Reference Measurement Waveform IDT™ Low Voltage 1:20 Differential ECL/PECL/HSTL Clock Fanout Buffer Advanced Clock Drivers Devices Freescale Timing Solutions ...

Page 8

MC100ES6221 Low Voltage 1:20 Differential ECL/PECL/HSTL Clock Fanout Buffer Understanding the Junction Temperature Range of the MC100ES6221 To make the optimum use of high clock frequency and low skew capabilities of the MC100ES6221, the MC100ES6221 is specified, characterized and tested ...

Page 9

MC100ES6221 Low Voltage 1:20 Differential ECL/PECL/HSTL Clock Fanout Buffer Using the Thermally Enhanced Package of the MC100ES6221 The MC100ES6221 uses a thermally enhanced exposed pad (EP) 52 lead LQFP package. The package is molded so that the lead frame is ...

Page 10

MC100ES6221 Low Voltage 1:20 Differential ECL/PECL/HSTL Clock Fanout Buffer 4X 0.2 H A-B D PIN 1 52 INDEX 1.7 MAX 0.40 J 52X 5 0.22 SEATING C PLANE ...

Page 11

MPC92459 MC100ES6221 PART NUMBERS 900 MHz Low Voltage LVDS Clock Synthesizer Low Voltage 1:20 Differential ECL/PECL/HSTL Clock Fanout Buffer INSERT PRODUCT NAME AND DOCUMENT TITLE Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: ...

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