ATA559001-6DSY Atmel, ATA559001-6DSY Datasheet
ATA559001-6DSY
Specifications of ATA559001-6DSY
Related parts for ATA559001-6DSY
ATA559001-6DSY Summary of contents
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Features • Backscatter-based UHF RFID IC (860 MHz to 960 MHz) Supporting Current and Future Radio Regulations • Support for All Data Structures Defined in ISO/IEC 18000-6, ISO/IEC 15961, ISO/IEC 15963, GS1 • Passive Backscatter-communication–based Data Carrier IC – 12 ...
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Figure 1-1. Block Diagram of the ATA5590 ESD, impedance adaptation and 2PSK return link modulator RF front end Preselect, ID, ID_s status1 register and control ATA5590 2 Low-power oscillator and clock center power supply Rectifier and POR generation POR RSSI, ...
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Parameters of the Link Table 1-1. Parameter Forward link encoding Forward link modulation Forward modulation index m Forward link data rate Forward link bit ordering Type of communication Type of command Return link data rate Return link modulation Return ...
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Table 1-2. Parameter Error detection forward link Error detection return link Error code during return link Error coding if forward CRC was correct but command unknown Error coding if memory address is unknown but command was known. Error coding if ...
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Table 1-3. Parameter Group management Collision arbitration Collision management Slots for Aloha Collision arbitration linearity (deterministic) Maximum tag inventory capability Maximum size of the memory Memory addressing Protection against overprogramming Tag identifier (Tag_ID) 4817C–RFID–03/07 Anticollision and Memory Parameters Description System ...
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Abbreviations 2PSK AFI Ant ASK Clk CRC CW DSF DSFID EEPROM EOF EOT ESD Forward link Reader to tag communication, to transport the command and the parameters GND ID ID_s I/O HBM LSB MHz MSB NRZ NRZI PR-ASK Pre ...
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Overview 2.1 Pinning Figure 2-1. Pinning TSSOP10 Table 2-1. Pin Description Pin Symbol Function 1 VSS Antenna_gnd 2 NC Not connected 3 NC Not connected 4 NC Not connected 5 NC Not connected 6 NC Not connected 7 NC ...
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Figure 2-2. Table 2-2. Pad Ant VSS VDD_in Test_Clk Test_dio1 Test_dio2 ATA5590 8 Pin Configuration of ATA5590 at Die Level Test_dio2 GND ring around the whole chip ATA5590 DIE Vdd_in Cross section to the Ant pad Ant Pads at Die ...
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Figure 2-3. The Pad Coordinates 108 1015 ANT 1250 VSS 110 24 24 4817C–RFID–03/07 804 VDD_in 60 ATA5590 DIE 138 1880 884 1544 1624 45 125 Test_dio2 Test_clk Test_dio1 125 45 1216 1296 1614 1694 ATA5590 9 ...
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Main Parameters of the Die Table 2-3. Parameter Shortest PIE time Longest PIE time Storage time of status bits: pre_select, ID, ID_s Programming time Note: Table 2-4. Parameter Input impedance Input impedance Notes: Table 2-5. Parameter Input impedance Input ...
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Table 2-6. Parameter Input impedance Input impedance Notes: Table 2-7. Parameter Input impedance Input impedance Notes: 2.3 Functional Changes and New Features Relative to ATA5590 Version 1 Table 2-8. Function Level Modulation coding FM0 Selected access mode during deterministic anticollision ...
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Memory ATA5590 is a wireless data carrier IC with a UHF carrier and backscatter-based link mechanism. Data is stored in an EEPROM, and the content is under the control of manufacturers and the end user. ATA5590 contains an EEPROM ...
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AFI Identifier The Application Family Identifier (AFI) supports a common group-selection mechanism 8-bit value. The structure and the function are described in ISO 18000-6, and based on ISO/IEC 15962. The AFI frame shall be used as ...
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Table 3-2. Block/Bit For private structures or for structures of closed data systems, the structure can be changed also possible to use other sizes for the ID. Notes: The administration byte is defined as: ...
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ID_type Coding The ID_type is an 8-bit value defined according to the DSF information in ISO/IEC 15962. Therefore, the ID is defined by the lower 5 bits of the DSFID information. The codes for the dif- ferent ID structures ...
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Memory Organization Summary Table 3-5. System Memory Logical Block Address Address Manufacturer System Info – 1 ...
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Table 3-6. User Memory Byte3 Logical Block Address Address ...
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Status Registers ATA5590 has two status registers. • Status1, which represents the selection status and • Status2, which represents the communication status Status1 contains the result of the arbitration procedure (Aloha-based or anticollision and group-selection status), and status2 contains ...
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Status2 Register Register status2 gives an overview of the status of communication part of a backscattered message during program commands and read commands. Table 4-3. Index 4.3 Frame Concept Communication is based on the following frames: • ...
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OSI1 Layer Concept To enable communication in even the worst environments, ATA5590 supports the following options: • The reader transmits clock ticks to the tags in the RF field. The clock tick receiver circuit tolerates ticks generated by PR-ASK ...
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Figure 4-2. During the data section of the forward stream, the tag backscatters the decoded value of the received data back to the reader. This enables the reader to control the quality of the link. It also enables the reader ...
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Default Frames of the Forward Link Stream The basic protocol contains the following elements: • A forward header to define the boundaries of the data encoding transmitted by the reader. • A data frame containing the command and its ...
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Use of the Random Number Generator ATA5590 supports several commands where the execution or the return link contents is based on random effects. Therefore, a random number generator is implemented on the ATA5590 chip. Random effects are used • ...
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Figure 4-6. The construction of the data frame itself depends on the command. It can contain • A status (status2) message (read, program commands, error) • An 8-bit random field (wake-up, and some arbitration commands) • A data field which ...
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During deterministic arbitration (deterministic selection procedures), the data field works in full duplex mode. The tag backscatters the value of its EEPROM value bit by bit, and the reader transfers (as a reaction to this information) a bit by bit ...
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Principal Communication Flow Figure 4-9. Figure 4-9 ATA5590 also supports other types of commands; in which case the flow can be slightly different able to control such flows, ATA5590 implements several state machines, which work in parallel ...
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States of the Tag To minimize communication problems, the tag has to first become synchronous to the RF stream transmitted by a reader; after this the tag is ready for communication. Additionally, most of the operations are controlled by ...
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Figure 4-11. Top Level State Diagram (Starting Point is RF_off, Main Path is Represented by a 4.9.1 Starting Point: RF Field Off As long as the tag is not powered, the tag is not able to operate. The tag stores ...
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RF Field On When a tag enters an RF field, and the RF field strength (in respect to the resonant frequency of the antenna and its bandwidth) is above a certain value, the reset circuit generates a power-on reset ...
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Observe State To enable further actions, such as programming, the chip must be synchronous to the reader. Therefore, some checks have to be made over the stream which is received by the tag (timing of the forward header must ...
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Ready State In this state, the enabling conditions are checked. If the conditions are true, the tag changes to the selected state, otherwise to the mute state. Figure 4-14. Ready State 4817C–RFID–03/07 Error Observe sync = 0 Sync = ...
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Active State If necessary, the rest of the forward frame (address, data, or both) must be received. Then the tag can carry out the required operation (program, arbitration, or starting the return link). Figure 4-15. Active State Isolated ATA5590 ...
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Mute State The mute state is quite similar to the select state. However, as the select condition was false, the tag remains silent, and no operation (such as programming, arbitration or backscattering data) is done. 4.9.8 Isolate State The ...
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After a tag has received a slot command • It takes a random number from the random number generator, which points to a slot number between 0 and 31 on-chip. • After receiving the start command, all tags backscatter their ...
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Figure 4-16. Aloha in Principle command Most of the commands supported by the ATA5590 consider the status1 contents. Therefore possible to communicate with a group, with a single tag, or with all tags in the RF field. Some ...
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ATA5590 supports several commands to solve collision problems deterministically. ATA5590 distinguishes between deterministic anticollision and the group-selection mechanism. The deter- ministic anticollision procedure of ATA5590 is based on a flexible binary tree algorithm which is characterized by: • A modified ...
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Figure 4-17. Arbitration Process The pre_select flag of status1 can be set and reset by group-selection commands. Therefore possible to select a group or a single tag with these command types. ATA5590 offers full duplex operation during group-selection ...
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Figure 4-18. Pre_select Flow During the deterministic-arbitration procedure, ID and ID_s flags can be set. The ID and ID_s flags are based on full duplex communication results. The ID flag is set to “1” if the tag wins an arbitration ...
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Figure 4-19. ID and ID_s Flow (Deterministic Arbitration) in Principle Deterministic procedures are able to influence the pre_select, the ID, and the ID_s flags. Figure 4-20. Selection Process in Principle 4817C–RFID–03/ ID_s = 0 New anticollision command ...
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The default anticollision procedure is based principally on a Tag_ID. The deterministic anticolli- sion procedure itself is based on an adaptable binary search. The adaptation is fully controlled by the reader, and allows a priority change on the fly. The ...
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Figure 4-21. Flow to Implement a Second Selection Level in Aloha Figure 4-22. Example for a Two-level Selection Process Over Time Listening and receiving Reader Next slot the ID Tag 1 Backscattering the ID Tag 2 silent Tag 3 silent ...
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Application-specific Selection Procedures 4.13.1 Initialization of Virgin Tags Out of a Group of Tags ATA5590 supports two possibilities for communication with virgin tags. During Aloha, the tags calculate a slot number which is independent from the memory contents. If ...
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Trigger Functionality After each POR or global reset command, the start state becomes active. In this state, ATA5590 reads the trigger configuration out of the EEPROM. If the trigger function is enabled (trigger con- figuration(1)), the second bit is ...
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Table 6-3. Command Anticollision_ID Anticollision_p Anticollision_p _random Table 6-4. Command Read32 Read32c Read128 Read128c Table 6-5. Command Program4byte Program4bytec Programnbyte 6.2 Short Commands Table 6-6. Command Get_ID_page GET_system ATA5590 44 Full-duplex Anticollision Commands Short Description Full-duplex anticollision command targeting ID ...
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Table 6-7. Command Wakeup_s Wakeup_sb Repeat_arb Slot Slot_selected Slot_not_selected Slot_repeat Skip_slot Slot_close The table above also contains temporary commands which are specified in commands are based on the command which was previously received by the tag. If the function is ...
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Elements of the Link As the tag normally works in a very noisy environment, the link must support techniques to achieve a high signal to noise ratio (SNR), and low bit error rates (BER). Therefore, the default link supports ...
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Short commands are based on the following fields: • Header for timing definition to be able to extract the following symbols (“0”, “1”, EOF) • 8-bit command field • EOT frame The 8-bit command field contains the 2-bit CRC. An ...
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Return Link The return link depends on the command. After receiving a read command based on: • Header section to define different timings and spectra • Status byte • Data section • CRC section • End of ...
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Robustness of the Link The robustness of the link depends on the likelihood of detecting an error. Therefore, the link is based on several mechanisms to control the robustness level. • The forward symbol definition is based on a ...
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Figure 7-1. 7.4.2 Sync Condition To enable the tag for communication it is necessary that the tag is synchronous to the reader. Therefore, the tag checks the timing of the forward header and the command CRC to decide if the ...
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Figure 7-2. Schematic of the 16-bit CRC Register (15) (14) (13) (12) Generator polynomial (CRC-CCITT) = > Comments: The generator polynomial is 17-bit-value The crc-result is 16-bit value The reset value ...
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Forward Stream 8.1 Forward Header The forward header consists of 4 symbols. The time between the notches is measured by ATA5590. Some of these timings are the base for PIE of the forward link. The timing relations are also ...
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During the following sections (data and EOF), the tag measures the time between two notch sig- nals. Considering the timing of 0* and EOF*, the tag decides if it has received a binary 0, a binary EOF. ...
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Accuracy Aspects of the Timing — Internal Oscillator The timing of the ATA5590 is based on an on-chip oscillator. The typical frequency is 420 kHz at 25°C at the die level. The tolerance of the oscillator is –10 to ...
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Modulation During the Forward Header ATA5590 changes the state of modulation during the forward header. The modulator is at state0 for a time1 after notch. Time1 is the time the tag needs for internal calculations, and is therefore also ...
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Table 8-1. Com(7:2) 001010 8.2.1.1 Group-selection Commands Group-selection commands can address the whole memory. The start address of the page is only fixed by using Group_afi or Group_ID commands. The end address is under the control of the reader, because ...
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Table 8-3. Com(7:2) 000000 010011 010101 Note: 8.2.1.3 Read commands Table 8-4. Com(7:2) 000100 100100 001100 100110 8.2.1.4 Program commands Table 8-5. Com(7:2) 001000 100000 011000 8.2.2 Short Command Codes After getting the length definition out of the header section, ...
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Table 8-7. Com(3:0) 0001 0010 0101 0110 0100 1000 1001 1010 1011 1100 1101 8.2.3 Error handling If ATA5590 receives a command which is not known by the IC, the tag does not backscatter a specific error code during the ...
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Parameter Field When using long commands, a parameter field transports an 8-bit data field to the tag defining selection mode and return link modulation encoding scheme. Additionally, address information and other command-specific data are defined. The default structure is ...
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Table 8-10. Addressing mode(1:0) Additional address information is transmitted via bits (5:3), the 8-bit address field which follows the parameter field, or both. To shorten the communication time, the system supports a symbolic addressing mechanism. When using the address bits ...
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Figure 8-4. 8.5 Overview of Addressing Modes The physical address of a memory cell is given by a block address and a bit address. The phys- ical block address itself is generated out of the transmitted page address plus a ...
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Table 8-13. Parameter(7) 1 symbolic address 0 physical address Table 8-14. Parameter(7) 1 symbolic address 0 physical address 8.6 Data Field To program the EEPROM, a 32-bit data field is used to transmit the contents of the block. 8.7 CRC ...
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Figure 8-6. Figure 8-7. Figure 8-8. backscatters If the tag receives a “1” because the reader has detected an error in the backscattered CRC stream, the internal crc_ok flag is set to fail, and the execution of the command is ...
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Return Link The return link is based on a synchronous communication style in combination with 2PSK-type modulation to get maximum SNR and minimum BER values. In synchronous mode, the tag backscatters the information regarding the bit information between two ...
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Table 9-1. Symbol/Function st 1 symbol Main timing, accuracy, and power management for the return link nd 2 symbol Timing reference rd 3 symbol Same timing as the fourth symbol th 4 symbol Timing reference for EOF detection Figure 9-1. ...
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Figure 9-2. ATA5590 66 Return Link Header Flow (Error Signalling Not Included) Start of return header Internal clock = slow wait Save timing for time-out set internal clock Wait on wait notch Set reference timing Wait on wait notch Set ...
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Loop Function The synchronous return link supports a loop function. If the tag has transmitted all data and CRC fields, the reader can start the loop function by sending a new header. The reader is free to change any ...
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Status Information The tag transfers the information stored in the status2 register back to the reader using read or program commands. The status2 register contains all the mandatory information and error codes which can be read out by the ...
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Adaptive Return Link CRC Field During return link operation, ATA5590 supports an adaptive CRC field. In the case of anticollision and group-selection commands, the function must be enabled by a bit in the parameter field. The control bit is ...
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Detailed Command Description 10.1 Common Parameters All commands are based on common parameter bits: • Define the encoding schema of the backscatter modulation — mod(1) and mod(0) • Define if the tag has to consider the results of the ...
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Reset Command After receiving the forward header, the reset command, the parameter, and the 16-bit CRC, the tag generates a complete or a partial soft reset. The command byte is 2Bh including the 2-bit command CRC. The selection mechanism ...
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Read Commands 10.3.1 Read32 and Read32c The read32 command reads a block (32 bits) of the memory. Read32c reads a block of the con- trol memory. Short, long, and symbolic addressing modes are supported. After receiving the header, the ...
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Read128 and Read128c The read128 command can read the full page of the memory. Read128c addresses a page in the control memory. Short, long, and symbolic addressing modes are supported. After receiving the header, the command, the parameters, and, ...
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Get_ID Page Get_ID page is a short command. After receiving the header, the tag expects only the 8-bit com- mand frame, the EOT frame, and the return header. Then it starts backscattering the status2 information and the expected data ...
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Program Commands 10.4.1 Programming Sequence Figure 10-4. Programming Sequence in More Detail Header Command, parameters, address, data, CRC, EOT Lock failure Header Command, parameters, address, data, CRC, EOT Erase failure Command, parameters, address, Header data, CRC, EOT Program failure ...
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Prog4byte and Prog4bytec The prog4byte and prog4bytec commands enable a programming sequence after receiving the complete command successfully. After programming, the tag expects the return header. Then, it transfers the status information and the data (read out of the ...
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Prognbyte Prognbyte is a long command supporting the address field. With this command it is possible to program only a portion of the selected block. The block and the page information are transmitted in the address field. The program ...
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Anticollision Procedures ATA5590 supports an Aloha-based selection procedure, a deterministic selection procedure, and the mixture of deterministic and Aloha. Additionally, the deterministic anticollision procedure supports non-unique ID structures (migra- tion path). To get a first impression about the situation, ...
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Aloha-based Anticollision Procedure Aloha anticollision is based on a slot mechanism. A tag calculates a slot number by a random counter. Inside each slot, a tag can communicate with the reader if the calculated slot value is the same ...
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Figure 12-1. Aloha Selection Process - Reset slot_counter - store random value - Backscatter ID page - wait on next command - calculate new random value if random value = 1 yes yes ATA5590 80 Start Aloha with Start - ...
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Deterministic Arbitration and Group Selection ATA5590 supports deterministic-based anticollision procedures as well as a group-selection mechanism. After initializing the link, an arbitration procedure follows. During these procedures, the link between the reader and tag is full duplex. This means ...
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Anticollision Status Register The status1 register contains the information of the anticollision procedure. A part of this register can be read out. The value of the status1 register is stored (at 25°C) after the supply voltage ...
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Figure 13-1. Flow Inside the Anticollision Procedure (nCRC_adapt is Set to “1”, Therefore, the 4817C–RFID–03/07 Inverted CRC is Backscattered to the Reader) Set ID_s No answer No answer possible possible Arbitration won yes Set ID Wait on next command Wait ...
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Figure 13-2. Arbitration Flow The arbitration procedure during anticollision is based on full duplex communication. The tag shares its internal bit value with the reader. The reader then has several options: • The reader dictates a select stream. Then in ...
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The arbitration works bit by bit. The reader itself defines the selected priority by the PIE signal during the arbitration. The timing reference is defined in the return link header. After each bit, the tag decides whether the arbitration is ...
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Reset Condition of Pre_select • If the pre_select flag was not set, and a power-on reset has occurred (reload function after POR) • group command was in use, and the tag did not win the arbitration (new ...
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Reset Conditions of Both Flags • During power-on reset or during the reset command • During the return link header if the tag has received a Get_ID, Get_System, Wakeup_sb, slot, slot_sb, slot_s, slot_close or slot_skip command • During the ...
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The structure of the whole frame is given by: Table 13-2. Forward header Notes: The arbitration starts with bit 103 (MSB of the LSByte of block 3, page 0 of the control memory). Therefore, it starts with an 8-bit preamble ...
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Further Possibilities with Anticollision_ID Command The start address of the arbitration can be selected by the parameter field. • Parameter(3): If set to “0”, the arbitration starts in block 3 of the ID page; if set to “1”, it ...
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Figure 13-4. AFI Selection Tree lost, if previously set A “0” is sent by transmitting a symbol shorter than the reference symbol (second symbol of the return header) to the tag. If the arbitration lost flag is not set after ...
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Table 13-6. The structure of the whole frame is as follows: Table 13-7. Forward header Note: The arbitration starts at bit 125 of page 0 (MSB of AFI) of the control memory. The arbitration will be lost if the extracted ...
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Bit-pointer–addressing Deterministic-anticollision and Group-selection Commands If the application requires the option of starting the arbitration outside the ID page start with a different bit position, ATA5590 supports bit-pointer addressing methods. Bit-pointer–based commands also support a care_ctrl bit ...
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Figure 13-5. Structure and Addressing Mechanism Supported by Group_pointer and Header 13.7.8 Group_p_leeq and Group_p_greq These group-selection commands are pointer-based. The structure is the same as before (Group_pointer commands). The difference is that the compare algorithm during arbitration is expanded ...
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Repeat_arb Repeat_arb can be activated if the reader has previously transmitted a group-selection or a deterministic-arbitration command. Then the command which was received before is repeated. The command code of the repeat_arb command is not stored in the command ...
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No status information byte will be sent during the stream. A slot has the size of a bit. Each tag will calculate a slot number randomly, and modulate one bit slot. The wake-up command can be used to get a ...
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Reset and Stand_by 14.1.1 Ramp Up Figure 14-1 Figure 14-1. Analog Timing Relations at 25°C ready = forward_en After POR has reset the digital circuits, the band gap is started. The band gap needs time for stabilization. After this ...
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Ramp Down If RF field strength is decreasing, VDD goes down to the threshold voltage level of stand_by. Current consumption decreases because the oscillator is stopped. Therefore, the gradient of the VDD curve decreases also. If VDD passes the ...
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Table 14-4. Parameter U notch_on U notch_off T notch1 T notch1 Minimum T The minimum time for T width of 250 kHz is 4 µs (sine transition between the two states of the modulation equals half of one period). When ...
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Figure 14-5. Notch Detection V is 0.66 switch 14.3 Notch Acceptance A first notch can be accepted by ATA5590 64 oscillator clock cycles after the oscillator was enabled. The oscillator itself starts operation 100 µs after stand_by signal was set ...
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Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated ...
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Electrical Characteristics (Continued) Operating characteristics 1. 25°C, 869 MHz DD No. Parameters Test Conditions Storage time status1 0.5s at +60°C 3.11 register 17 minutes at –40°C 3.12 set status flag 1.8V 3.13 reset status flag 1.8V 3.14 ...
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... Ordering Information Extended Type Number ATA559001-DBB ATA559001-DDW ATA559001-6DQY 18. Package Information Figure 18-1. TSSOP10 Package Package: TSSOP 10 (acc. to JEDEC Standard MO-187) Dimensions in mm Not indicated tolerances ± 0.05 0.5 nom 0 nom. ATA5590 102 Package Remarks 25 µm NiAu bumps, 150 µm wafer thickness, sawn on foil, 6” ...
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... VDD_in Test_dio2 ANT VSS Test_clk Test_dio1 0 1.88 59.5 63.5 B 227.7 150 3 A 194.5 A 212 ATA5590 0.15 ±0.012 0.025 (0.1) Label: Prod: ATA559001-M13DBB Lot no: Wafer no Qty: Wafer ATA559001-M13DBB UV Tape NITTO DU-200 6" Wafer frame, plastic thickness 2.5mm Drawing-No.: 9.920-6658.01-4 Issue: 1; 09.03.07 103 ...
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Table of Contents Features ..................................................................................................... 1 1 Description ............................................................................................... 1 2 Overview ................................................................................................... 7 3 Memory ................................................................................................... 12 4 Communication ...................................................................................... 17 5 Trigger Functionality ............................................................................. 43 6 Commands ............................................................................................. 43 ATA5590 104 1.1 Parameters of the Link .........................................................................................3 ...
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Elements of the Link .............................................................................. 46 8 Forward Stream ...................................................................................... 52 9 Return Link ............................................................................................. 64 10 Detailed Command Description ............................................................ 70 11 Anticollision Procedures ....................................................................... 78 12 Aloha-based Anticollision Procedure .................................................. 79 4817C–RFID–03/07 7.1 Forward Link ......................................................................................................46 7.2 ...
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Deterministic Arbitration and Group Selection ................................... 81 14 Analog Timing ........................................................................................ 95 15 Absolute Maximum Ratings ................................................................ 100 16 Electrical Characteristics .................................................................... 100 17 Ordering Information ........................................................................... 102 18 Package Information ............................................................................ 102 19 Table of Contents ................................................................................. 104 ...
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