74FCT16244ATPAG Integrated Device Technology (Idt), 74FCT16244ATPAG Datasheet - Page 5

• Manufacturer Part Number: 74FCT16244ATPAG
• Description: Buffer/Line Driver 16-CH Non-Inverting 3-ST CMOS 48-Pin TSSOP Tube
• Manufacturer: Integrated Device Technology (Idt)

Specifications of 74FCT16244ATPAG

• Package: 48TSSOP
• Logic Family: FCT
• Logic Function: Buffer/Line Driver
• Number Of Outputs Per Chip: 16
• Output Type: 3-State
• Input Signal Type: Single-Ended
• Maximum Propagation Delay Time @ Maximum Cl: 4.8@5V ns
• Typical Quiescent Current: 5 uA
• Polarity: Non-Inverting

TEST CIRCUITS AND WAVEFORMS
IDT54/74FCT16244T/AT/CT
FAST CMOS 16-BIT BUFFER/LINE DRIVER
ASYNCHRONOUS CONTROL
SYNCHRONOUS CONTROL
Generator
CLOCK ENABLE
INPUT TRANSITION
INPUT TRANSITION
Pulse
OPPOSITE PHASE
SAME PHASE
PRESET
PRESET
TIMING
CLEAR
CLEAR
INPUT
INPUT
DATA
OUTPUT
V
Set-up, Hold, and Release Times
ETC.
ETC.
IN
Test Circuits for All Outputs
Propagation Delay
R
T
D.U.T.
V
t
PLH
t
CC
PLH
t
t
SU
SU
V
OUT
t
REM
t
H
t
t
C
PHL
PHL
50pF
L
t
H
500Ω
500Ω
V
V
3V
1.5V
0V
1.5V
3V
1.5V
0V
OH
OL
7.0V
3V
1.5V
0V
3V
1.5V
3V
1.5V
0V
3V
1.5V
0V
0V
5
DEFINITIONS:
C
R
SWITCH POSITION
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; t
L
T
= Load capacitance: includes jig and probe capacitance.
= Termination resistance: should be equal to Z
NORMALLY
NORMALLY
CONTROL
HIGH-LOW-HIGH
LOW-HIGH-LOW
OUTPUT
OUTPUT
INPUT
HIGH
All Other Tests
LOW
Disable Low
Enable Low
Open Drain
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
Test
PULSE
PULSE
SWITCH
CLOSED
SWITCH
OPEN
ENABLE
t
Enable and Disable Times
t
PZH
PZL
Pulse Width
1.5V
1.5V
3.5V
0V
t
PHZ
OUT
t
W
DISABLE
F
of the Pulse Generator.
≤ 2.5ns; t
t
PLZ
Switch
Closed
Open
0.3V
0.3V
R
≤ 2.5ns.
V
V
3V
1.5V
0V
3.5V
0V
OL
OH
1.5V
1.5V