AD9203ARU Analog Devices Inc, AD9203ARU Datasheet - Page 13

• Manufacturer Part Number: AD9203ARU
• Description: ADC Single Pipelined 40MSPS 10-Bit Parallel 28-Pin TSSOP
• Manufacturer: Analog Devices Inc

Specifications of AD9203ARU

• Package: 28TSSOP
• Resolution: 10 Bit
• Sampling Rate: 40 MSPS
• Architecture: Pipelined
• Number Of Analog Inputs: 1
• Digital Interface Type: Parallel
• Input Type: Voltage
• Signal To Noise Ratio: 60(Typ) dB
• Rohs Status: RoHS non-compliant
• Number Of Bits: 10
• Sampling Rate (per Second): 40M
• Data Interface: Parallel
• Number Of Converters: 5
• Power Dissipation (max): 108mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-TSSOP (0.173", 4.40mm Width)

10µF
EXTERNAL REFERENCE OPERATION
Figure 22 illustrates the use of an external reference. An
external reference may be necessary for several reasons. Tighter
reference tolerance will enhance the accuracy of the ADC and
will allow lower temperature drift performance. When several
ADCs track one another, a single reference (internal or
external) will be necessary. The AD9203 will draw less power
when an external reference is used.
When the REFSENSE pin is tied to AVDD, the internal
reference will be disabled, allowing the use of an external
reference.
The AD9203 contains an internal reference buffer. It will load
the external reference with an equivalent 10 kΩ load. The
internal buffer will generate positive and negative full-scale
references for the ADC core.
In Figure 22, an external reference is used to set the midscale set
point for single-ended use. At the same time, it sets the input
voltage span through a resistor divider. If the ADC is being
driven differentially through a transformer, the external
reference can set the center tap (common-mode voltage).
0.1µF
5V
1.5V
REFSENSE
0V
0.1µF
VREF
EXTERNAL
Figure 21. Programmable Reference Configuration
REF (2V)
R
R
AINN
A
B
AINP
Figure 22. External Reference Configuration
0.1µF
10µF
LOGIC
3.0V
2.0V
1.0V
1.5kΩ
1.5kΩ
A3
AVDD
AD9203
0.1µF
+
–
CORE
ADC
0.5V
1V
REFTF
REFBF
VREF
AINN
REFSENSE
AINP
1.125V
AD9203
0.1µF
0.1µF
1.875V
10µF
0.1µF
Rev. B | Page 13 of 28
CLAMP OPERATION
The AD9203 contains an internal clamp. It may be used when
operating the input in a single-ended mode. This clamp is very
useful for clamping NTSC and PAL video signals to ground.
The clamp cannot be used in the differential input mode.
Figure 23 shows the internal clamp circuitry and the external
control signals needed for clamp operation. To enable the
clamp, apply a logic high 1 to the CLAMP pin. This will close
SW1, the internal switch. SW1 is opened by asserting the
CLAMP pin low 0. The capacitor holds the voltage across C
constant until the next interval. The charge on the capacitor will
leak off as a function of input bias current (see Figure 24).
DRIVING THE ANALOG INPUT
Figure 25 illustrates the equivalent analog input of the AD9203,
(a switched capacitor input). Bringing CLK to a logic high,
opens S3 and closes S1 and S2. The input source connected to
AIN and must charge Capacitor C
CLK to a logic low opens S2, and then S1 opens followed by
closing S3. This puts the input in the hold mode.
1V p-p
250
200
150
100
–50
Figure 24. Input Bias Current vs. Input Voltage (F
50
0
0
Figure 23. Clamp Configuration (VREF = 0.5 V)
0.5
0V DC
1.0
REFSENSE
INPUT VOLTAGE (V)
C
IN
VREF
AINN
CLAMPIN
CLAMP
1.5
AINP
H
during this time. Bringing
50Ω TYP
2.0
AD9203
CORE
ADC
S
= 40 MSPS)
2.5
SW1
AD9203
3.0
IN