MT90863AG Zarlink, MT90863AG Datasheet - Page 11

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MT90863AG

Manufacturer Part Number
MT90863AG
Description
RATE CONVERSION DIGITAL SWITCH
Manufacturer
Zarlink
Datasheet

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2.0
A functional Block Diagram of the MT90863 is shown in Figure 1. One end of the MT90863 is used to interface with
backplane applications, such as HMVIP or H.100 environments, while the other end supports the local switching
environments.
2.1
The Device Mode Selection (DMS) register allows users to select three different frame alignment timing modes. In
ST-BUS modes, the master clock (C16i) is always at 16.384 MHz. The frame pulse (F0i) input accepts a negative
frame pulse at 8 kHz. The frame pulse goes low at the frame boundary for 61 ns. The frame pulse output F0o
provides a 244 ns wide negative frame pulse and the C4o output provides a 4.094 MHz clock. These two signals
are used to support local switching applications. See Figure 4 for the ST-BUS timings.
In CT Bus mode, the C4i/C8i pin accepts 8.192 MHz clock for the CT Bus frame pulse alignment. The F0i is the CT
bus frame pulse input. The CT frame pulse goes low at the frame boundary for 122 ns. See Figure 5 for the CT Bus
timing.
In HMVIP mode, the C4i/C8i pin accepts 4.096 MHz clock for the HMVIP frame pulse alignment. The F0i is the
HMVIP frame pulse input. The HMVIP frame pulse goes low at the frame boundary for 244 ns. See Figure 6 for the
HMVIP timing.
Table 1 - describes the input timing requirements for ST-BUS, CT Bus and HMVIP modes.
3.0
The device has four operation modes for the backplane interface and three operation modes for the local interface.
These modes can be programmed via the Device Mode Selection (DMS) register. Mode selections between the
backplane and local interfaces are independent. See Table 2 and Table 3 for the selection of various operation
modes via the programming of the DMS register.
3.1
The backplane interface can be programmed to accept data streams of 2 Mb/s, 4 Mb/s or 8 Mb/s. When 2 Mb/s
mode is enabled, STio0 to STio31 have a data rate of 2.048 Mb/s. When 4 Mb/s mode is enabled, STio0 to STio31
have a data rate of 4.096 Mb/s. When 8 Mb/s mode is enabled, STio0 to STio15 have a data rate of 8.192 Mb/s.
When HMVIP mode is enabled, STio0 to STio15 have a data rate of 2.048 Mb/s and STio16 to STio23 have a data
rate of 8.192 Mb/s. Table 2 describes the data rates and mode selection for the backplane interface.
Frame Alignment Timing
Backplane Interface
Switching Configuration
Functional Description
Zarlink Semiconductor Inc.
MT90863
11
Data Sheet

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