LAN9420-NU SMSC, LAN9420-NU Datasheet - Page 3

• Manufacturer Part Number: LAN9420-NU
• Description: Ethernet ICs Single-Chip HP Ethernet Controller
• Manufacturer: SMSC
• Type: Single Chip MAC and PHY Controllerr

Specifications of LAN9420-NU

• Ethernet Connection Type: 10 Base-T, 100 Base-TX
• Maximum Power Dissipation: 0.7 W
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Product: Ethernet Controllers
• Number Of Transceivers: 1
• Standard Supported: 802.3, 802.3u
• Data Rate: 10 Mbps, 100 Mbps
• Supply Voltage (max): 3.3 V
• Supply Voltage (min): 0 V
• Maximum Operating Temperature: + 70 C
• Package / Case: TQFP-100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface
General Description
SMSC LAN9420/LAN9420i
LAN9420/LAN9420i is a full-featured, Fast Ethernet controller which allows for the easy and cost-
effective integration of Fast Ethernet into a PCI-based system. A system configuration diagram of
LAN9420/LAN9420i in a typical embedded environment can be seen in
by an internal block diagram of LAN9420/LAN9420i in
consists of a PCI Local Bus Specification Revision 3.0 compliant interface
MAC, and 10/100 Ethernet PHY.
LAN9420/LAN9420i provides full IEEE 802.3 compliance and all internal components support full/half-
duplex 10BASE-T, 100BASE-TX, and manual full-duplex flow control. The descriptor based scatter-
gather DMA supports usage of zero-copy drivers, effectively increasing throughput while decreasing
Host load. The integrated IRQ deassertion timer allows a minimum IRQ deassertion time to be set,
providing reduced Host load and greater control over service routines. Automatic 32-bit CRC
generation/checking, automatic payload padding, and 2K jumbo packets (2048 byte) are supported.
Big, little, and mixed endian support provides independent control over register, descriptor, and buffer
endianess. This feature enables easy integration into various ARM/MIPS/PowerPC designs.
LAN9420/LAN9420i supports the PCI Bus Power Management Interface Specification Revision 1.1 and
provides the optional ability to generate wake events in the D3cold state when Vaux is available. Wake
on LAN, wake on link status change (energy detect), and magic packet wakeup detection are also
supported, allowing for a range of power management options.
LAN9420/LAN9420i contains an EEPROM controller for connection to an optional EEPROM. This
allows for the automatic loading of static configuration data upon power-up or reset. When connected,
the EEPROM can be configured to load a predetermined MAC address, the PCI SSID, and the PCI
SSVID of LAN9420/LAN9420i.
In addition to the primary functionality described above, LAN9420/LAN9420i provides additional
features designed for extended functionality. These include a multipurpose 16-bit configurable General
Purpose Timer (GPT), a Free-Run Counter, a 3-pin configurable GPIO/LED interface, and 2 GPO pins.
All aspects of LAN9420/LAN9420i are managed via a set of memory mapped control and status
registers.
LAN9420/LAN9420i’s performance and features make it an ideal solution for many applications in the
consumer electronics, enterprise, and industrial automation markets. Targeted applications include: set
top boxes (cable, satellite and IP), digital televisions, digital video recorders, home gateways, digital
media clients/servers, industrial automation systems, industrial single board PCs, and kiosk/POS
enterprise equipment.
PRODUCT PREVIEW
3
Figure 2 on page
Figure 1 on page
,
DMA Controller, Ethernet
4. LAN9420/LAN9420i
Revision 1.4 (12-17-08)
4, followed