DS34S102GN Maxim Integrated Products, DS34S102GN Datasheet - Page 11

• Manufacturer Part Number: DS34S102GN
• Description: Communication ICs - Various Dual TDM-Over-Packet Transport Devices A
• Manufacturer: Maxim Integrated Products

Note 1:
Note 2:
Rev: 032609
____________________________________________________ DS34S101, DS34S102, DS34S104, DS34S108
PIN NAME
H_WR_BE2_N / SPI_SEL_N
H_WR_BE3_N / SPI_CI
H_READY_N
H_INT
JTAG Interface
JTRST_N
JTCLK
JTMS
JTDI
JTDO
Reset and Factory Test Pins
RST_SYS_N
HIZ_N
SCEN
STMD
MBIST_EN
MBIST_DONE
MBIST_FAIL
TEST_CLK
TST_CLD
Power and Ground
DVDDC
DVDDIO
DVSS
ACVDD1, ACVDD2
ACVSS1, ACVSS2
In pin names, the suffix “n” stands for port number: n=1 to 8 for DS34S108; n=1 to 4 for DS34S104; n=2 for DS34S102; n=1 for
DS34S101. All pin names ending in “_N” are active low.
All pins, except power and analog pins, are CMOS/TTL unless otherwise specified in the pin description.
PIN TYPES
I = input pin
I
I
IO = input/output pin
IO
IO
O = output pin
O
P = power-supply or ground pin
PD
PU
Z
PD
PU
= input pin with internal 50kΩ pulldown to DVSS
= input pin with internal 50kΩ pullup to DVDDIO
= output pin that can be placed in a high-impedance state
= input/output pin with internal 50kΩ pulldown to DVSS
= input/output pin with internal 50kΩ pullup to DVDDIO
TYPE
Ipu
Ipd
Ipu
Ipu
Ipu
Ipd
Ipd
Oz
Oz
O
O
O
O
P
P
P
P
P
I
I
I
I
I
PIN DESCRIPTION
Host Write Enable Byte 2 or SPI Chip Select (Active Low)
Host Write Enable Byte 3 (Active Low) or SPI Clock Invert
Host Ready Output (Active Low)
Host Interrupt Output.
JTAG Test Reset
JTAG Test Clock
JTAG Test Mode Select
JTAG Test Data Input
JTAG Test Data Output
System Reset (Active Low)
High Impedance Enable (Active Low)
Used for factory tests.
Used for factory tests.
Used for factory tests.
Used for factory tests.
Used for factory tests
Used for factory tests.
Used for factory tests. DS34S104 only.
1.8V Core Voltage for TDM-over-Packet Digital logic (17 pins)
3.3V for I/O Pins (16 pins)
Ground for TDM-over-Packet logic and I/O Pins (31 pins)
1.8V for CLAD Analog Circuits
Ground for CLAD Analog Circuits
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