Si5338G-A-GM Silicon Laboratories Inc, Si5338G-A-GM Datasheet - Page 18

• Manufacturer Part Number: Si5338G-A-GM
• Description: Clock Generators & Support Products I2C-PRGRMBL clock generatr 0.16-700MHz
• Manufacturer: Silicon Laboratories Inc

Specifications of Si5338G-A-GM

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Si5338
Synthesis of the output clocks is performed in two
stages, as shown in Figure 5. The first stage consists of
a high-frequency analog phase-locked loop (PLL) that
multiplies the input stage to a frequency within the
range of 2.2 to 2.84 GHz. Multiplication of the input
frequency is accomplished using a proprietary and
highly precise MultiSynth feedback divider (N), which
allows the PLL to generate any frequency within its
VCO range with much less jitter than typical fractional N
PLL.
18
ref
fb
Figure 5. Synthesis Stages
Frequency
Detector
Phase
Synthesis
f
Stage 1
VCO
(APLL)
MultiSynth
÷N
Loop
Filter
2.2-2.84 GHz
VCO
Figure 6. Silicon Labs’ MultiSynth Technology
Divider Select
(DIV1, DIV2)
Fractional-N
Divider
Synthesis
MultiSynth
MultiSynth
MultiSynth
MultiSynth
Stage 2
÷MS0
÷MS1
÷MS2
÷MS3
MultiSynth
Rev. 1.0
Phase Error
Calculator
The second stage of synthesis consists of the output
MultiSynth dividers (MS
divider, the MultiSynth divider shown in Figure 6
switches seamlessly between the two closest integer
divider values to produce the exact output clock
frequency with 0 ppm error.
To eliminate phase error generated by this process, the
MultiSynth block calculates the relative phase difference
between the clock produced by the fractional-N divider
and the desired output clock and dynamically adjusts
the phase to match the ideal clock waveform. This novel
approach makes it possible to generate any output
clock frequency without sacrificing jitter performance.
This architecture allows the output of each MultiSynth to
produce any frequency from 5 to F
support higher frequency operation, the MultiSynth
divider can be bypassed. In bypass mode, integer divide
ratios of 4 and 6 are supported. This allows for output
frequencies of F
to 367–473.33 MHz and 550–710 MHz respectively.
Because each MultiSynth uses the same VCO output,
there are output frequency limitations when output
frequencies greater than F
For example, if 375 MHz is needed at the output of
MultiSynth0, the VCO frequency would need to be
2.25 GHz. Now, all the other MultiSynths can produce
any frequency from 5 MHz up to a maximum frequency
of 2250/8 = 281.25 MHz. MultiSynth1,2,3 could also
produce F
two unique frequencies above F
F
vco
/6 and F
vco
vco
Adjust
Phase
/4 = 562.5 MHz or F
/4.
vco
/4 and F
x
). Based on a fractional N
vco
vco
/8 are desired.
/6 MHz, which translates
f
vco
OUT
vco
/6 = 375 MHz. Only
/8 can be output:
vco
/8 MHz. To