CS4222-KS Cirrus Logic Inc, CS4222-KS Datasheet - Page 5

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CS4222-KS

Manufacturer Part Number
CS4222-KS
Description
Audio CODECs IC 20-Bit Stereo Codec w/Vol Cntrl
Manufacturer
Cirrus Logic Inc
Datasheets

Specifications of CS4222-KS

Number Of Adc Inputs
2
Number Of Dac Outputs
2
Conversion Rate
48 KSPs
Interface Type
Serial (I2C, SPI)
Resolution
20 bit
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Package / Case
SSOP-28
Minimum Operating Temperature
- 10 C
Number Of Channels
2 ADC, 2 DAC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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DS236F1
Pin Name
NC
SMUTE
LRCK
SCLK
VD
DGND
SDOUT
SDIN
SCL/CCLK
SDA/CDIN
AD0/CS
DEM0
DEM1
AINR-,
AINR+
AINL-,
AINL+
VA
AGND
AOUTR-,
AOUTR+
AOUTL-,
AOUTL+
RST
15, 28
23, 24 Differential Right Channel Analog Outputs (Output) - The full scale analog output level (differential) is
25, 26 Differential Left Channel Analog Outputs (Output) - The full scale analog output level (differential) is
16,17 Differential Right Channel Analog Input (Input) - Analog input connections of the right channel differ-
19,20 Differential Left Channel Analog Input (Input) - Analog input connections of the left channel differential
1,14,
13
18
10
11
12
21
22
27
#
2
4
5
6
7
8
9
Pin Description
No Connect - These pins are not connected internally and should be tied to DGND to minimize noise
coupling.
Soft Mute (Input) - Activates a muting function for both the left and right channel D/A converter outputs.
Soft muting is achieved by ramping down the volume in 0.5 dB steps until achieving mute if SOFT bit
(DAC Control Byte #2) is set to 0 (default).
Left/Right Clock (Input) - Determines which channel is currently being input/output of the serial audio
data pins SDIN/SDOUT. The frequency of the Left/Right clock must be equal to the input sample rate.
Although the outputs for each ADC channel are transmitted at different times, Left/Right pairs represent
simultaneously sampled analog inputs.
Serial Data Clock (Input) - Clocks the individual bits of the serial data into the SDIN pin and out of the
SDOUT pin.
Digital Power (Input) - Positive power supply for the digital section. Nominally 5.0 VDC.
Digital Ground (Input) - Digital ground for the digital section.
Serial Data Output (Output) - Two's complement MSB-first serial data is output on this pin.
Serial Data Input (Input) - Two's complement MSB-first serial data is input on this pin.
Serial Control Port Clock (Input) - Serial clock for the control port interface. This pin should be tied to
DGND in stand-alone mode.
Serial Control Port Data (Input/Output) - SDA is a data I/O line in I
pull-up resistor according to the I
SPI mode. This pin should be tied to DGND in stand-alone mode.
Address Bit/Control Chip Select (Input) - In I
used to enable the control port interface on the CS4222. The CS4222 will enter SPI mode if a negative
transition is ever seen on this pin after power up. This pin should be tied to DGND in stand-alone mode.
De-emphasis Control (Input) - Selects the standard 15µs/50µs digital de-emphasis filter response for
32, 44.1 and 48 kHz sample rate.
ential inputs. Typically 2 Vrms differential (1 Vrms for each input pin) for a fullscale analog input signal.
inputs. Typically 2 Vrms differential (1 Vrms for each input pin) for a fullscale analog input signal.
Analog Power (Input) - Positive power supply for the analog section. Typically 5.0 VDC.
Analog Ground (Input) - Analog ground reference.
specified in the Analog Characteristics specification table.
specified in the Analog Characteristics specification table.
Reset (Input) - When low, the device enters a low power mode and all internal registers are reset,
including the control port. When high, the control port becomes operational and normal operation will
occur.
2
C specification. CDIN in the input data line for the serial control port in
2
C mode, AD0 is a chip address bit. In SPI mode, CS is
2
C mode and requires an external
CS4222
5

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