CY7C1470V25-200AXC Cypress Semiconductor Corp, CY7C1470V25-200AXC Datasheet - Page 15

CY7C1470V25-200AXC

CY7C1470V25-200AXC

Manufacturer Part Number
CY7C1470V25-200AXC
Description
CY7C1470V25-200AXC
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C1470V25-200AXC

Format - Memory
RAM
Memory Type
SRAM - Synchronous
Memory Size
72M (2M x 36)
Speed
200MHz
Interface
Parallel
Voltage - Supply
2.375 V ~ 2.625 V
Operating Temperature
0°C ~ 70°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
428-2165
CY7C1470V25-200AXC

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Part Number:
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Quantity:
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2.5 V TAP AC Test Conditions
Input pulse levels................................................V
Input rise and fall time .....................................................1 ns
Input timing reference levels........................................ 1.25 V
Output reference levels ............................................... 1.25 V
Test load termination supply voltage ........................... 1.25 V
2.5 V TAP AC Output Load Equivalent
TAP DC Electrical Characteristics and Operating Conditions
(0 °C < T
Identification Register Definitions
Document Number: 38-05290 Rev. *L
V
V
V
V
V
V
I
Revision number (31:29)
Device depth (28:24)
Architecture/memory type(23:18)
Bus width/density(17:12)
Cypress JEDEC ID code (11:1)
ID register presence indicator (0)
Note
X
11. All voltages referenced to V
OH1
OH2
OL1
OL2
IH
IL
Parameter
TDO
A
Instruction Field
< +70 °C; V
Z = 50
Output HIGH voltage
Output HIGH voltage
Output LOW voltage
Output LOW voltage
Input HIGH voltage
Input LOW voltage
Input load current
O
DD
SS
Description
= 2.5 V ± 0.125 V unless otherwise noted)
(GND).
1.25V
CY7C1470V25
00000110100
(2 M × 36)
001000
100100
01011
20pF
000
50
I
I
I
I
GND  V
1
OH
OH
OL
OL
= 1.0 mA
= 100 A
= –1.0 mA
= –100 A
SS
to 2.5 V
I
 V
CY7C1472V25
00000110100
DDQ
Test Conditions
(4 M × 18)
001000
010100
01011
000
1
1.8 V TAP AC Test Conditions
Input pulse levels.................................... 0.2 V to V
Input rise and fall time .....................................................1 ns
Input timing reference levels.......................................... 0.9 V
Output reference levels ................................................. 0.9 V
Test load termination supply voltage ............................. 0.9 V
1.8 V TAP AC Output Load Equivalent
[11]
V
V
V
V
V
V
V
V
V
V
DDQ
DDQ
DDQ
DDQ
DDQ
DDQ
DDQ
DDQ
DDQ
DDQ
= 2.5 V
= 2.5 V
= 1.8 V
= 2.5 V
= 2.5 V
= 1.8 V
= 2.5 V
= 1.8 V
= 2.5 V
= 1.8 V
CY7C1474V25
TDO
00000110100
(1 M × 72)
001000
110100
01011
000
1
Z = 50
O
Describes the version number
Reserved for internal use
Defines memory type and
architecture
Defines width and density
Allows unique identification of
SRAM vendor
Indicates the presence of an ID
register
1.26
–0.3
–0.3
Min
1.7
2.1
1.6
1.7
–5
Description
V
V
DD
DD
Max
0.36
0.4
0.2
0.2
0.7
CY7C1470V25
CY7C1472V25
CY7C1474V25
0.9V
5
+ 0.3
+ 0.3
20pF
50
Page 15 of 31
DDQ
Unit
A
V
V
V
V
V
V
V
V
V
V
– 0.2
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