CS8416-CZZR Cirrus Logic Inc, CS8416-CZZR Datasheet - Page 29

• Manufacturer Part Number: CS8416-CZZR
• Description: IC,Digital Audio Receiver,CMOS,TSSOP,28PIN,PLASTIC
• Manufacturer: Cirrus Logic Inc
• Type: Digital Audio Interface Receiverr

Specifications of CS8416-CZZR

• Applications: Recorders, Set-Top Boxes
• Mounting Type: Surface Mount
• Package / Case: 28-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1017 - BOARD EVAL FOR CS8416 RCVR
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: Q3824147A

DS578F3
9. GENERAL PURPOSE OUTPUTS
Three General Purpose Outputs (GPO) are provided to allow the equipment designer flexibility in configuring the
CS8416. Fourteen signals are available to be routed to any of the GPO pins. The outputs of the GPO pins are set
through the GPOxSEL[3:0] bits in the Control2 (02h) and Control3 (03h) registers. All GPO pins default to GND
after reset.
GPO pins may be configured to provide the following data:
Notes:
Codes 1110 to 1111 - Reserved
Function
HRMCK
NVERR
VLRCK
AUDIO
96KHZ
EMPH
RERR
RCBL
GND
VDD
INT
TX
C
U
1. Frequency = 25 MHz Max, duty cycle not guaranteed, target duty cycle = 50% @ F
Code
0000
0001
0010
0100
0101
1000
1001
1010
0011
0110
0111
1011
1100
1101
Fixed low level
State of EMPH bit in the incoming data stream.
CS8416 interrupt output
Channel status bit
User data bit
Receiver Error
Non-Validity Receiver Error
Receiver Channel Status Block
If the input sample rate is ≤ 48 kHz, outputs a “0”. Outputs a “1” if the sample rate is ≥ 88.1 kHz.
Otherwise the output is indeterminate.
Non-audio indicator for decoded input stream
Virtual LRCK. Can be used to frame the C and U output data.
Pass through of AES/SPDIF input selected by TXSEL[2:0] in the Control 4 register (04h)
VDD fixed high level
F
S
X 512
(Note 1)
Table 3. GPO Pin Configurations
Definition
S
= 48 kHz.
CS8416
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