CS4299-BQZR Cirrus Logic Inc, CS4299-BQZR Datasheet - Page 20

• Manufacturer Part Number: CS4299-BQZR
• Description: IC AC97 Codec With SRC
• Manufacturer: Cirrus Logic Inc

4.1
SE[4:0]
ID8
ID7
ID4
Default
Any write to this register causes a Register Reset to the default state of the audio (Index 00h - 38h) and vendor spe-
cific (Index 5Ah - 7Ah) registers. A read from this register returns configuration information about the CS429.
4.2
Mute
ML[5:0]
MR[5:0]
Default
20
20
Mute
D15
D15
0
Reset Register (Index 00h)
Master Volume Register (Index 02h)
D14
SE4
D14
0
D13
SE3
D13
ML5
Crystal 3D Stereo Enhancement. SE[4:0] = 00110, indicating this feature is present.
18-bit ADC Resolution. The ID8 bit is ‘set’, indicating this feature is present.
20-bit DAC resolution. The ID7 bit is ‘set’, indicating this feature is present.
Headphone Output (Alt Line Out). The ID4 bit is ‘set’, indicating this feature is present.
1990h. The data in this register is read-only data.
Master Mute. Setting this bit mutes the LINE_OUT_L/R output signals.
Master Volume Left. These bits control the left master output volume. Each step corresponds
to 1.5 dB gain adjustment, with 00000 = 0 dB. The total range is 0 dB to -94.5 dB attenuation.
Master Volume Right. These bits control the right master output volume. Each step corresponds
to 1.5 dB gain adjustment, with 00000 = 0 dB. The total range is 0 dB to -94.5 dB attenuation.
8000h. This value corresponds to 0 dB attenuation and Mute ‘set’.
SE2
ML4
D12
D12
SE1
ML3
D11
D11
ML2
D10
SE0
D10
ML1
D9
D9
0
ML0
ID8
D8
D8
ID7
D7
D7
0
D6
D6
0
0
MR5
D5
D5
0
MR4
ID4
D4
D4
MR3
D3
D3
0
MR2
CS4299-BQ
D2
D2
0
CS4299-BQ
DS319-BQPP2
MR1
D1
D1
0
MR0
D0
D0
0