ADR5044ARTZ-R2 Analog Devices Inc, ADR5044ARTZ-R2 Datasheet - Page 10

• Manufacturer Part Number: ADR5044ARTZ-R2
• Description: IC,VOLT REFERENCE,FIXED,4.096V,BIPOLAR,TO-236,3PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Series: ADR504r

Specifications of ADR5044ARTZ-R2

• Reference Type: Shunt
• Voltage - Output: 4.096V
• Tolerance: ±0.2%
• Temperature Coefficient: 100ppm/°C
• Number Of Channels: 1
• Current - Cathode: 50µA
• Current - Output: 15mA
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: SOT-23-3, TO-236-3, Micro3™, SSD3, SST3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Input: -
• Current - Quiescent: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADR5040/ADR5041/ADR5043/ADR5044/ADR5045
TERMINOLOGY
Temperature Coefficient
The change in output voltage with respect to operating temperature
changes. It is normalized by an output voltage of 25°C. This
parameter is expressed in ppm/°C and is determined by the
following equation:
where:
V
V
V
OUT
OUT
OUT
(25°C) = V
(T
(T
TCV
1
2
) = V
) = V
OUT
OUT
OUT
⎡
⎢ ⎣
ppm
OUT
°
at Temperature 1.
at Temperature 2.
C
at 25°C.
⎤
⎥ ⎦
=
V
V
O
OUT
UT
(
25
( )
T
2
°
C
−
)
V
×
OUT
(
T
2
( )
−
T
T
1
1
)
×
10
6
(1)
Rev. A | Page 10 of 16
Thermal Hysteresis
The change in output voltage after the device is cycled through
temperatures ranging from +25°C to −40°C, then to +125°C, and
back to +25°C. This is common in precision reference and is
caused by thermal-mechanical package stress. Changes in envi-
ronmental storage temperature, board mounting temperature, and
the operating temperature are some of the factors that can
contribute to thermal hysteresis. The following equation
expresses a typical value from a sample of parts put through
such a cycle:
where:
V
V
−40°C, then to +125°C, and back to +25°C.
OUT
OUT_TC
(25°C) = V
V
V
OUT
OUT
= V
_
_
HYS
HYS
OUT
[
at 25°C after a temperature cycle from +25°C to
=
ppm
OUT
V
OUT
at 25°C.
]
=
(
25
V
OUT
°
C
(
V
)
25
−
OUT
V
°
OUT
C
(
25
)
−
_
°
V
TC
C
OUT
)
_
TC
×
10
6
(2)