RK-900-FDTC Radiotronix, RK-900-FDTC Datasheet - Page 5

• Manufacturer Part Number: RK-900-FDTC
• Description: RF Modules & Development Tools Rapid Developmnt Kit
• Manufacturer: Radiotronix

Specifications of RK-900-FDTC

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

General Description
The EWM-900-FDTC is a complete, fully-integrated
FM/FSK transceiver module capable of full-duplex
transmission and reception of voice and data. The
transceiver operates on one of 56 channels in the 902-
928MHz unlicensed band.
No external RF components (except for the antenna)
are required.
The transceiver is configured via a 3-wire serial
programming interface comprised of LE, DAT, and
CLK. Parameters that can be set using this interface
include transmit channel, receive channel, transmit
enable, and receive enable.
The unique zero-IF receiver architecture allows for a
simple, low-cost solution that does not exhibit the
image frequency interference problems of traditional
super-het designs.
Theory of Operation
A block diagram of the EWM-900-FDTC transceiver is
shown in figure 3.
The antenna input pin is connected directly to the SAW
duplexer. The purpose of the duplexer is to separate
the receive and transmit frequency bands, effectively
combining them while isolating the transmit and receive
circuitry. Table 3 shows the frequency plan for -BS
(base station) and -HS (handset) versions of the
module. It should be noted that -BS modules can only
talk to -HS modules and visa-versa because of the
complimentary frequency plan.
The receive port of the duplexer is connected to a low-
noise-amplifier. The purpose of the amplifier is to
compensate for the signal loss through the duplexer
and to improve the noise figure of the receiver. The
LNA is used when the signal level is low and should
be turned off for strong signals. In strong signal
conditions, the LNA is turned off to improve the linearity
of the receiver.
Preliminary
Rev Date 7/25/01
After the LNA, the incoming carrier is directly converted
to baseband (zero-IF) using a pair of quadrature
mixers. Special DC offset correction circuitry is
employed to ensure proper operation at zero-IF. After
the mixers, the receive chain is split into a quadrature
pair (I-chain and Q-chain).
Following the quadrature mixers, a pair of variable-
gain-amplifiers and low-pass-filters are used to amplify
and filter the low-level input signal. Because the
receiver uses a zero-IF architecture, these filters can
be realized on-chip using only resistors and capacitors,
reducing the size and cost of the transceiver.
The gain of the quadrature down-conversion mixers
and variable-gain-amplifiers is automatically controlled
by an internal AGC circuit. This is done to maintain
linearity in the receive chain.
The RSSI circuit derives the RSSI voltage from the Q
receive chain.
Demodulation is achieved by up-converting the
baseband to 140kHz and digitizing the resultant
frequency spectrum. A special P/D circuit is used to
demodulate the carrier and generate an analog
waveform using a 9-bit D/A converter. In strong signal
conditions, this will result in a 44dB SINAD.
The analog output is low-pass filtered to remove IF
noise. The audio output is the output of the LPF. The
data slicer converts the analog waveform at the audio
output to a digital waveform for digital applications.
The transceiver includes on-board frequency
synthesizers for the transmitter and the receiver. These
are programmed through the serial programming
interface discussed later in this document.
The transmitter synthesizer includes a modulation input
that can be driven with digital or analog information.
There is a 150hz high-pass filter on this input.
Therefore, DC voltage levels cannot be sent.
The output of the transmitter synthesizer is connected
to a power amplifier that boosts the output power to
+3dBm typical. After the losses through the duplexer,
the output transmit power is 0dBm typical.
EWM-900-FDTC
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