722M IDT, Integrated Device Technology Inc, 722M Datasheet - Page 3

• Manufacturer Part Number: 722M
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 722M

• Output Level: CMOS
• Frequency Stability: ±30
• Symmetry Max: 60%
• Operating Supply Voltage (typ): 3.3
• Pin Count: 8
• Mounting Style: Surface Mount
• Screening Level: Commercial
• Frequency Tolerance: ±20
• Product Height (mm): 1.5mm
• Rad Hardened: No
• Package / Case: SOIC N
• Lead Free Status / RoHS Status: Not Compliant

External Component Selection
The ICS722 requires a minimum number of external
components for proper operation.
Decoupling Capacitors
A decoupling capacitor of 0.01µF should be connected
between VDD and GND on pins 2 and 4 as close to the
ICS722 as possible. For optimum device performance, the
decoupling capacitor should be mounted on the component
side of the PCB. Avoid the use of vias in the decoupling
circuit.
Series Termination Resistor
When the PCB trace between the clock output and the load
is over 1 inch, series termination should be used. To series
terminate a 50Ω trace (a commonly used trace impedance),
place a 33Ω resistor in series with the clock line, as close to
the clock output pin as possible. The nominal impedance of
the clock output is 20Ω .
Quartz Crystal
The ICS722 VCXO function consists of the external crystal
and the integrated VCXO oscillator circuit. To assure the
best system performance (frequency pull range) and
reliability, a crystal device with the recommended
parameters (shown below) must be used, and the layout
guidelines discussed in the following section shown must be
followed.
The oscillation frequency of a quartz crystal is determined
by its “cut” and by the load capacitors connected to it. The
ICS722 incorporates on-chip variable load capacitors that
“pull” (change) the frequency of the crystal. The crystal
specified for use with the ICS722 is designed to have zero
frequency error when the total of on-chip + stray
capacitance is
14 pF.
Recommended Crystal Parameters:
The external crystal must be connected as close to the chip
IDT™ / ICS™ LOW COST 27 MHZ 3.3 VOLT VCXO
ICS722
LOW COST 27 MHZ 3.3 VOLT VCXO
Initial Accuracy at 25
Temperature Stability
Aging
Load Capacitance
Shunt Capacitance, C0
C0/C1 Ratio
Equivalent Series Resistance
°
C
35 Ω Max
7 pF Max
±20 ppm
±30 ppm
±20 ppm
250 Max
14 pf
3
as possible and should be on the same side of the PCB as
the ICS722. There should be no via’s between the crystal
pins and the X1 and X2 device pins. There should be no
signal traces underneath or close to the crystal. See
application note MAN05.
Crystal Tuning Load Capacitors
The crystal traces should include pads for small fixed
capacitors, one between X1 and ground, and another
between X2 and ground. Stuffing of these capacitors on the
PCB is optional. The need for these capacitors is
determined at system prototype evaluation, and is
influenced by the particular crystal used (manufacture and
frequency) and by PCB layout. The typical required
capacitor value is 1 to 4 pF.
The procedure for determining the value of these capacitors
can be found in application note MAN05.
ICS722
REV B 110409
VCXO