PIC18F2520-E/SO Microchip Technology, PIC18F2520-E/SO Datasheet - Page 141
PIC18F2520-E/SO
Manufacturer Part Number
PIC18F2520-E/SO
Description
28 PIN, 32 KB ENH FLASH, 3804 RAM, 25 I/O, PB FREE,
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F2221-ISO.pdf
(46 pages)
3.PIC18F2420-IML.pdf
(412 pages)
4.PIC18F2420-IML.pdf
(16 pages)
5.PIC18F2420-IML.pdf
(8 pages)
6.PIC18F2420-IML.pdf
(6 pages)
7.PIC18F2420-IML.pdf
(8 pages)
8.PIC18F2420-IML.pdf
(4 pages)
Specifications of PIC18F2520-E/SO
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SOIC (7.5mm Width)
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
MSSP, SPI, I2C, PSP, USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
25
Number Of Timers
1 x 8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163022, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MCP3909RD-3PH1 - REF DESIGN MCP3909 3PH ENGY MTR
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F2520-E/SO
Manufacturer:
MIC
Quantity:
36
Part Number:
PIC18F2520-E/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- PIC18F2221-ISO PDF datasheet #2
- PIC18F2420-IML PDF datasheet #3
- PIC18F2420-IML PDF datasheet #4
- PIC18F2420-IML PDF datasheet #5
- PIC18F2420-IML PDF datasheet #6
- PIC18F2420-IML PDF datasheet #7
- PIC18F2420-IML PDF datasheet #8
- Current page: 141 of 412
- Download datasheet (7Mb)
15.0
PIC18F2420/2520/4420/4520 devices all have two
CCP (Capture/Compare/PWM) modules. Each module
contains a 16-bit register which can operate as a 16-bit
Capture register, a 16-bit Compare register or a PWM
Master/Slave Duty Cycle register.
In 28-pin devices, the two standard CCP modules (CCP1
and CCP2) operate as described in this chapter. In 40/
44-pin devices, CCP1 is implemented as an Enhanced
CCP module with standard Capture and Compare
modes and Enhanced PWM modes. The ECCP imple-
mentation is discussed in Section 16.0 “Enhanced
Capture/Compare/PWM (ECCP) Module”.
REGISTER 15-1:
© 2008 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-4
bit 3-0
U-0
—
CAPTURE/COMPARE/PWM
(CCP) MODULES
Unimplemented: Read as ‘0’
DCxB<1:0>: PWM Duty Cycle bit 1 and bit 0 for CCPx Module
Capture mode:
Unused.
Compare mode:
Unused.
PWM mode:
These bits are the two LSbs (bit 1 and bit 0) of the 10-bit PWM duty cycle. The eight MSbs (DCxB<9:2>)
of the duty cycle are found in CCPRxL.
CCPxM<3:0>: CCPx Module Mode Select bits
0000 = Capture/Compare/PWM disabled (resets CCPx module)
0001 = Reserved
0010 = Compare mode, toggle output on match (CCPxIF bit is set)
0011 = Reserved
0100 = Capture mode, every falling edge
0101 = Capture mode, every rising edge
0110 = Capture mode, every 4th rising edge
0111 = Capture mode, every 16th rising edge
1000 = Compare mode, initialize CCPx pin low; on compare match, force CCPx pin high (CCPxIF bit is set)
1001 = Compare mode, initialize CCPx pin high; on compare match, force CCPx pin low (CCPxIF bit is set)
1010 = Compare mode, generate software interrupt on compare match (CCPxIF bit is set, CCPx pin
1011 = Compare mode, trigger special event; reset timer; CCP2 match starts A/D conversion (CCPxIF
11xx = PWM mode
U-0
—
reflects I/O state)
bit is set)
CCPxCON: CCPx CONTROL REGISTER (28-PIN DEVICES)
W = Writable bit
‘1’ = Bit is set
DCxB1
R/W-0
PIC18F2420/2520/4420/4520
DCxB0
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CCPxM3
R/W-0
The capture and compare operations described in this
chapter apply to all standard and Enhanced CCP
modules.
Note: Throughout this section and Section 16.0
“Enhanced Capture/Compare/PWM (ECCP)
Module”, references to the register and bit
names for CCP modules are referred to gener-
ically by the use of ‘x’ or ‘y’ in place of the
specific module number. Thus, “CCPxCON”
might refer to the control register for CCP1,
CCP2 or ECCP1. “CCPxCON” is used
throughout these sections to refer to the mod-
ule control register, regardless of whether the
CCP module is a standard or enhanced
implementation.
CCPxM2
R/W-0
x = Bit is unknown
CCPxM1
R/W-0
DS39631E-page 139
CCPxM0
R/W-0
bit 0
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