LM96000CIMT National Semiconductor, LM96000CIMT Datasheet - Page 13

• Manufacturer Part Number: LM96000CIMT
• Description: IC,Data Acquisition System,7-CHANNEL,8-BIT,TSSOP,24PIN,PLASTIC
• Manufacturer: National Semiconductor

Specifications of LM96000CIMT

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Register
Address
28h
29h
2Ah
2Bh
2Ch
2Dh
2Eh
2Fh
4.3 Register 28-2Fh: Fan Tachometer Reading
The Fan Tachometer Reading registers contain the number of 11.111 µs periods (90 kHz) between full fan revolutions. The results
are based on the time interval of two tachometer pulses, since most fans produce two tachometer pulses per full revolution. These
registers will be updated at least once every second.
The value, for each fan, is represented by a 16-bit unsigned number.
The Fan Tachometer Reading registers will always return an accurate fan tachometer measurement, even when a fan is disabled
or non-functional.
The least two significant bits (LEVEL1 and LEVEL2) of the least significant byte are used to indicate the accuracy level of the
tachometer reading. The accuracy ranges from most to least accurate. [LEVEL1:LEVEL2]=11indicates a most accurate value,
[LEVEL1:LEVEL2]=01 indicates the least accurate value and [LEVEL1:LEVEL2]=00 is reserved for future use.
FF FFh indicates that the fan is not spinning, or that the tachometer input is not connected to a valid signal. These registers are
read only — a write to these registers has no effect.
When the LSByte of the LM96000 16-bit register is read, the other byte (MSByte) is latched at the current value until it is read. At
the end of the MSByte read the Fan Tachometer Reading registers are updated.
During spin-up, the PWM duty cycle reported is 0%.
Read/
Write
R
R
R
R
R
R
R
R
Register
Name
Tach1 LSB
Tach1 MSB
Tach2 LSB
Tach2 MSB
Tach3 LSB
Tach3 MSB
Tach4 LSB
Tach4 MSB
Bit 7
(MSB)
7
15
7
15
7
15
7
15
Bit 6
6
14
6
14
6
14
6
14
Bit 5
5
13
5
13
5
13
5
13
13
Bit 4
4
12
4
12
4
12
4
12
Bit 3
3
11
3
11
3
11
3
11
Bit 2
2
10
2
10
2
10
2
10
Bit 1
LEVEL1
9
LEVEL1
9
LEVEL1
9
LEVEL1
9
Bit 0
(LSB)
LEVEL0
8
LEVEL0
8
LEVEL0
8
LEVEL0
8
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Default
Value
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A