LP3985IM5-3.3 National Semiconductor, LP3985IM5-3.3 Datasheet - Page 14

• Manufacturer Part Number: LP3985IM5-3.3
• Description: IC, LDO VOLT REG, 3.3V, 150mA, 5-SOT-23
• Manufacturer: National Semiconductor

Specifications of LP3985IM5-3.3

• Primary Input Voltage: 6V
• Output Voltage Fixed: 3.3V
• Dropout Voltage Vdo: 100mV
• No. Of Pins: 5
• Output Current: 150mA
• Operating Temperature Range: -40°C To +125°C
• Termination Type: SMD
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

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Application Hints
capacitor are consulted for all conditions as some capacitor
sizes (e.g. 0402) may not be suitable in the actual applica-
tion.
The ceramic capacitor’s capacitance can vary with tempera-
ture. The capacitor type X7R, which operates over a tem-
perature range of -55˚C to +125˚C, will only vary the capaci-
tance to within
tolerance over a reduced temperature range of -55˚C to
+85˚C. Most large value ceramic capacitors () 2.2µF) are
manufactured with Z5U or Y5V temperature characteristics.
Their capacitance can drop by more than 50% as the tem-
perature goes from 25˚C to 85˚C. Therefore X7R is recom-
mended over Z5U and Y5V in applications where the ambi-
ent temperature will change significantly above or below
25˚C.
Tantalum capacitors are less desirable than ceramic for use
as output capacitors because they are more expensive when
comparing equivalent capacitance and voltage ratings in the
1µF to 4.7µF range.
Another important consideration is that tantalum capacitors
have higher ESR values than equivalent size ceramics. This
means that while it may be possible to find a tantalum
capacitor with an ESR value within the stable range, it would
have to be larger in capacitance (which means bigger and
more costly ) than a ceramic capacitor with the same ESR
value. It should also be noted that the ESR of a typical
tantalum will increase about 2:1 as the temperature goes
from 25˚C down to −40˚C, so some guard band must be
allowed.
NOISE BYPASS CAPACITOR
Connecting a 0.01µF capacitor between the C
and ground significantly reduces noise on the regulator out-
put. This cap is connected directly to a high impedance node
in the band gap reference circuit. Any significant loading on
this node will cause a change on the regulated output volt-
age. For this reason, DC leakage current through this pin
must be kept as low as possible for best output voltage
accuracy.
FIGURE 3. Graph Showing A Typical Variation in
±
Capacitance vs DC Bias
15%. The capacitor type X5R has a similar
(Continued)
10136467
BYPASS
pin
14
The types of capacitors best suited for the noise bypass
capacitor are ceramic and film. High-quality ceramic capaci-
tors with either NPO or COG dielectric typically have very
low leakage. Polypropolene and polycarbonate film capaci-
tors are available in small surface-mount packages and
typically have extremely low leakage current.
Unlike many other LDO’s, addition of a noise reduction
capacitor does not effect the load transient response of the
device.
NO-LOAD STABILITY
The LP3985 will remain stable and in regulation with no
external load. This is specially important in CMOS RAM
keep-alive applications.
ON/OFF INPUT OPERATION
The LP3985 is turned off by pulling the V
turned on by pulling it high. If this feature is not used, the V
pin should be tied to V
time. To assure proper operation, the signal source used to
drive the V
the specified turn-on/off voltage thresholds listed in the Elec-
trical Characteristics section under V
FAST ON-TIME
The LP3985 output is turned on after Vref voltage reaches its
final value (1.23V nomial). To speed up this process, the
noise reduction capacitor at the bypass pin is charged with
an internal 70uA current source. The current source is turned
off when the bandgap voltage reaches approximately 95% of
its final value. The turn on time is determined by the time
constant of the bypass capacitor. The smaller the capacitor
value, the shorter the turn on time, but less noise gets
reduced. As a result, turn on time and noise reduction need
to be taken into design consideration when choosing the
value of the bypass capacitor.
micro SMD MOUNTING
The micro SMD package requires specific mounting tech-
niques which are detailed in National Semiconductor Appli-
cation Note (AN-1112). Referring to the section Surface
Mount Technology (SMT) Assembly Considerations, it
should be noted that the pad style which must be used with
the 5 pin package is NSMD (non-solder mask defined) type.
For best results during assembly, alignment ordinals on the
PC board may be used to facilitate placement of the micro
SMD device.
micro SMD LIGHT SENSITIVITY
Exposing the micro SMD device to direct sunlight will cause
misoperation of the device. Light sources such as halogen
lamps can effect electrical performance if brought near to the
device.
The wavelengths which have most detrimental effect are
reds and infra-reds, which means that the fluorescent light-
ing used inside most buildings has very little effect on per-
formance. A micro SMD test board was brought to within
1cm of a fluorescent desk lamp and the effect on the regu-
lated output voltage was negligible, showing a deviation of
less than 0.1% from nominal.
EN
input must be able to swing above and below
IN
to keep the regulator output on at all
IL
and V
EN
IH
.
pin low, and
EN