SC4215ISTRT Semtech, SC4215ISTRT Datasheet - Page 7

• Manufacturer Part Number: SC4215ISTRT
• Description: IC, LDO VOLT REG, 2A, 8-SOIC
• Manufacturer: Semtech

Specifications of SC4215ISTRT

• Primary Input Voltage: 5.5V
• Dropout Voltage Vdo: 300mV
• No. Of Pins: 8
• Output Current: 2A
• Operating Temperature Range: -40°C To +125°C
• Termination Type: SMD
• Output Voltage Min: 0.8V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Applications Information (continued)
Introduction
The SC425 is intended for applications where high
current capability and very low dropout voltage are
required. It provides a very simple, low cost solution that
uses very little PCB real estate. Additional features include
an enable pin to allow for a very low power consumption
standby mode, and a fully adjustable output.
Component Selection
Input capacitor: A large bulk capacitance ≥ 0µF/A
(output load) should be closely placed to the input supply
pin of the SC425 to ensure that Vin does not sag below
.4V. Also a minimum of 4.7µF ceramic capacitor is recom-
mended to be placed directly next to the Vin pin. This
allows for the device being some distance from any bulk
capacitance on the rail. Additionally, input droop due to
load transients is reduced, improving load transient
response. Additional capacitance may be added if required
by the application.
Output capacitor: A minimum bulk capacitance of ≥
0µF/A (output load), along with a 0.µF ceramic decou-
pling capacitor is recommended. Increasing the bulk
capacitance will improve the overall transient response.
The use of multiple lower value ceramic capacitors in par-
allel to achieve the desired bulk capacitance will not cause
stability issues. Although designed for use with ceramic
output capacitors, the SC425 is extremely tolerant of
output capacitor ESR values and thus will also work com-
fortably with tantalum output capacitors.
Noise immunity: In very electrically noisy environments,
it is recommended that 0.µF ceramic capacitors be placed
from IN to GND and OUT to GND as close to the device
pins as possible.
Internal voltage selection: By connecting the ADJ pin to
GND, an internal resistor divider will regulate the output
voltage to 2.5V.
If the ADJ pin is connected directly to the VO pin, the
output voltage will be regulated to the 0.8V internal
reference.
External voltage selection resistors: The use of %
resistors, and designing for a current flow ≥ 0µA is rec-
ommended to ensure a well regulated output (thus R2
≤50kΩ). A suitable value for R2 can be chosen in the range
of kΩ to 50kΩ. R can then be calculated from.
Enable: Pulling this pin below 0.4V turns the regulator off,
reducing the quiescent current to a fraction of its operat-
ing value. A pull up resistor up to 400kOhms should be
connected from this pin to the VIN pin in applications
where supply voltages of Vin < .9V are required. For
applications with higher voltages than .9V, EN pin could
be left open or connected to VIN.
Thermal Considerations
The power dissipation in the SC425 is given by:
The allowable power dissipation will be dependant on the
thermal impedance achieved in the application. The derat-
ing curve below is valid for the thermal impedance speci-
fied in the Thermal Information section on page .
R
R
P
P
D
D
1
1
=
=
≈
≈
R
R
I
I
O
O
2
2
⋅
⋅
⋅
⋅
(
(
V
V
(
(
V
V
IN
IN
O
O
V
V
−
−
−
−
REF
REF
V
V
V
V
O
O
REF
REF
)
)
)
)
7