PIC18LF6680-I/L Microchip Technology, PIC18LF6680-I/L Datasheet - Page 4

• Manufacturer Part Number: PIC18LF6680-I/L
• Description: IC, 8BIT MCU, PIC18LF, 40MHZ, PLCC-64
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF6680-I/L

• Controller Family/series: PIC18
• No. Of I/o's: 53
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 3328Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Core Size: 8 Bit
• Program Memory Size: 32768 Words
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.25K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 68-PLCC
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3328 B
• Interface Type: I2C, SPI, AUSART, CAN
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 8
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18F6585/6680/8585/8680
15. Module: Enhanced Controller Area
EXAMPLE 2:
DS80162E-page 4
If (RXBnOVFL == 1)
Under specific conditions, the first five bits of a
transmitted identifier may not match the value in
the Transmit Buffer ID register, TXBnSIDH. The
following conditions must exist for the corruption to
occur:
• A transmit message must be pending.
• The ECAN module must detect a Start-of-
Work around
None.
Date Codes that pertain to this issue:
All engineering and production devices.
Frame (SOF) in the third bit of interframe
space.
{
}
Temp_RXREG = RXBx;
If (MyFlag)
{
}
Network (ECAN™ Technology)
If (TXREQ == 1)
{
}
TXREQ = 1;
MyFlag = 0;
TXREQ = 0;
If (TXABT == 1)
MyFlag = 1;
// Has an overflow occurred?
// Is a transmission pending?
// Clear transmit request
// Store transmission aborted status value
// Read receive buffer
// Was previous transmission aborted?
// Set transmit request
// Reset stored transmission aborted status
16. Module: Enhanced Controller Area
Under specific conditions, the TXBnSIDH register
of the pending message for transmission may be
corrupted. The following conditions must exist for
this event to occur:
• A transmit message must be pending.
• All of the receive buffers must be full with a
• A receiver buffer must be made available
Work around
Ensure that a receive buffer overflow condition
does not occur and/or ensure that a transmit
request is not pending if a receive buffer overflow
condition does exist.
The pseudo code segment in Example 2 is an
example of how to disable a pending transmission.
This code is for illustration purposes only.
Date Codes that pertain to this issue:
All engineering and production devices.
received message in the Message Assembly
Buffer (MAB).
(RXBnCON<RXFUL> set to ‘0’) at one of the
following times:
- When a Start-of-Frame (SOF) is recognized
- On the instruction cycle prior to the SOF.
The timing of this event is crucial.
on the CAN bus.
Network (ECAN™ Technology)
© 2007 Microchip Technology Inc.