PIC18F46K20-E/P Microchip Technology, PIC18F46K20-E/P Datasheet - Page 3

• Manufacturer Part Number: PIC18F46K20-E/P
• Description: IC, 8BIT MCU, PIC18F, 64MHZ, DIP-40
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F46K20-E/P

• Controller Family/series: PIC18
• No. Of I/o's: 36
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 3936Byte
• Cpu Speed: 64MHz
• No. Of Timers: 4
• Core Size: 8 Bit
• Program Memory Size: 32768 Words
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: CCP, ECCP, EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 4
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 14 Channel
• Package: 40PDIP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 64 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPDM164124 - KIT STARTER FOR PIC18F4XK20
• Lead Free Status / Rohs Status: Details

19. Module: Clocks
20. Module: Comparators
21. Module: Comparators
22. Module: Data EEPROM Memory
23. Module: Program Flash Memory
© 2008 Microchip Technology Inc.
EC Mode operation is limited to a maximum of
48 MHz.
Work around
Use HS Clock mode for external clocking above
48 MHz.
Comparator input offset voltage is ± 25 mV and
may degrade over the lifetime of the part
accelerated by high temperature. The offset voltage
increases as the common-mode voltage decreases
with the following characteristics: Offset is ± 25 mV
when the common-mode voltage is V
is up to ± 50 mV when the common-mode voltage
is V
the common-mode voltage is 0V.
Work around
None.
When the CxON bit is clear, the output from the
comparator will be properly forced to zero, but the
CxPOL bit will improperly have no effect on the
CxOUT bit. This prevents presetting the compara-
tor change-on-interrupt mismatch latches as
described in the data sheet.
Work around
Configure one of the unused comparator input
channels as a digital output. Use that digital output
to manipulate the comparator output to the desired
CxOUT non-interrupt level. When the comparator
is then set to the desired inputs, the mismatch
latches will be preset to the non-interrupt level and
the CxIF flag can then be cleared.
The write/erase endurance of Data EE Memory is
limited to 10K cycles.
Work around
Use error correction method that stores data in
multiple locations.
The write/erase endurance of the PFM is limited to
1K cycles when V
degrades when V
Work around
For data tables in program Flash memory, use the
error correction method that stores data in multiple
locations.
DD
/2; The offset is greater than ± 50 mV when
DD
DD
is below 3V.
is above 3V. Endurance
DD
; The offset
24. Module: Input/Output (PIC18F26K20
25. Module: Timer 1
PIC18F26K20/46K20
Reading PORTE bit 3 always returns 0.
Work around
None.
In Asynchronous Counter mode, a false interrupt
may occur on the first rising T1CKI clock edge
after writing the TMR1H or TMR1L register.
Work around
Examine the TMR1H:TMR1L register pair in the
Interrupt
TMR1H:TMR1L register pair is less than the
preset value then service the interrupt. Otherwise,
disregard the interrupt and only clear the Timer1
interrupt flag.
only)
Service
Routine
DS80379A-page 3
(ISR).
If
the