PCF8579T/1 NXP Semiconductors, PCF8579T/1 Datasheet - Page 17

• Manufacturer Part Number: PCF8579T/1
• Description: IC, LCD DRIVER, COLUMN, 56VSOP
• Manufacturer: NXP Semiconductors

Specifications of PCF8579T/1

• Supply Current: 9µA
• Meter Display Type: LCD
• Supply Voltage Range: 2.5V To 6V
• Driver Case Style: VSOP
• No. Of Pins: 56
• Operating Temperature Range: -40°C To +85°C
• Base Number: 8579
• Interface: RoHS Compliant
• Interface Type: I2C
• Rohs Compliant: Yes

NXP Semiconductors
PCF8579_5
Product data sheet
8.7.1 Data pointer
8.7.2 Subaddress counter
8.7 Display RAM
8.8 Command decoder
The PCF8579 contains a 32
is divided into 4 banks of 40 bytes (4
transferred to or from the RAM via the I
The addressing mechanism for the display RAM is realized using the data pointer. This
allows an individual data byte or a series of data bytes to be written into, or read from, the
display RAM, controlled by commands sent on the I
The storage and retrieval of display data is dependent on the content of the subaddress
counter. Storage and retrieval take place only when the contents of the subaddress
counter matches with the hardware subaddress at pins A0, A1, A2 and A3.
The command decoder identifies command bytes that arrive on the I
The five commands available to the PCF8579 are defined in
Table 6.
The most-significant bit of a command is the continuation bit C (see
Figure
Table 7.
Command
Bit
set-mode
set-start-bank
device-select
RAM-access
load-X-address
Bit
7
Fig 14. General information of command byte
14). Commands are transferred in WRITE mode only.
C = 0; last command.
C = 1; commands continue.
Symbol
C
Definition of PCF8579 commands
C bit description
Operation code
7
C
C
C
C
C
Value
0
1
Rev. 05 — 11 May 2009
6
1
1
1
1
0
MSB
40-bit static RAM which stores the display data. The RAM
C
5
0
1
1
1
X[5:0]
Description
continue bit
LCD column driver for dot matrix graphic displays
last control byte in the transfer; next byte will be regarded
as display data
control bytes continue; next byte will be a command too
8
2
REST OF OPCODE
C-bus.
4
T
1
0
1
40 bits). During RAM access, data is
3
E[1:0]
1
A[3:0]
G[1:0]
2
C-bus.
2
1
msa833
LSB
Table
1
M[1:0]
B[1:0]
Y[1:0]
6.
2
Table 7
C-bus.
0
PCF8579
© NXP B.V. 2009. All rights reserved.
Reference
Table 8
Table 9
Table 10
Table 11
Table 12
and
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