CLC001AJE National Semiconductor, CLC001AJE Datasheet - Page 6

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CLC001AJE

Manufacturer Part Number
CLC001AJE
Description
LVDS CABLE DRIVER ADJ, SMD, SOIC8
Manufacturer
National Semiconductor
Datasheet

Specifications of CLC001AJE

Supply Voltage Range
3V To 3.6V
Digital Ic Case Style
SOIC
No. Of Pins
8
Operating Temperature Range
-40°C To +85°C
Svhc
No SVHC (15-Dec-2010)
Operating Temperature Max
85°C
Operating
RoHS Compliant
Base Number
001
Data Rate
622Mbps
Rohs Compliant
Yes

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Device Operation
INPUT INTERFACING
Numerous input configurations exist for applying PECL,
LVPECL, and LVDS signals to the input of the CLC001.
Inputs may be single-ended or differential, AC or DC
coupled.
The V
inputs. Leave this pin as a no connect when no bias is
needed. Note that DC-coupled inputs such as direct LVDS
and LVPECL connections are self-biasing and do not require
use of the V
depends on R
remain constant, and the bias voltage is determined by the
value of resistance, R
Figure 3 and Figure 4 show how R
common V
respectively. Some common input configurations are shown
in Figure 5 through Figure 9.
BB
FIGURE 3. R
pin may be used to provide a DC bias voltage to the
BB
BB
values with R
REF
pin. I
. For a given R
BB
BB
, the current produced by the V
BB
vs. V
, between the V
REF
BB
held at 1.91 kΩ and 1.5 kΩ,
for R
REF
BB
REF
corresponds to some
, the I
BB
= 1.91 kΩ
pin and ground.
10132911
BB
current will
BB
pin,
6
FIGURE 4. R
BB
vs. V
BB
for R
REF
= 1.5 kΩ
10132912

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