CS42518-CQ Cirrus Logic Inc, CS42518-CQ Datasheet - Page 61

• Manufacturer Part Number: CS42518-CQ
• Description: IC, AUDIO CODEC, 24BIT, 192KHZ, LQFP-64
• Manufacturer: Cirrus Logic Inc

Specifications of CS42518-CQ

• Audio Codec Type: Stereo
• No. Of Adcs: 2
• No. Of Dacs: 8
• No. Of Input Channels: 2
• No. Of Output Channels: 8
• Adc / Dac Resolution: 24bit
• Adcs / Dacs Signal To Noise Ratio: 110dB
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

DS584F1
6.16
6.16.1 ADC LEFT CHANNEL GAIN (LGAINX)
6.17
6.17.1 ADC RIGHT CHANNEL GAIN (RGAINX)
6.18
6.18.1 SERIAL PORT SYNCHRONIZATION (SP_SYNC)
SP_SYNC
Reserved
Reserved
7
7
7
ADC Left Channel Gain (address 1Ch)
ADC Right Channel Gain (address 1Dh)
Receiver Mode Control (address 1Eh)
Default = 00h
Function:
Default = 00h
Function:
The level of the left analog channel can be adjusted in 1 dB increments as dictated by the Soft and
Zero Cross bits (SZC[1:0]) from +15 to -15 dB. Levels are decoded in two’s complement, as shown
in
The level of the right analog channel can be adjusted in 1 dB increments as dictated by the Soft and
Zero Cross bits (SZC[1:0]) from +15 to -15 dB. Levels are decoded in two’s complement, as shown
in
Default = 0
0 - CX & SAI Serial Port timings not in phase
1 - CX & SAI Serial Port timings are in phase
Function:
Forces the LRCK and SCLK from the CX & SAI Serial Ports to align and operate in phase. This func-
tion will operate when both ports are running at the same sample rate or when operating at different
sample rates.
Table
Table
Reserved
Reserved
Reserved
6
6
6
17.
17.
Binary Code
001010
000101
000000
110110
110001
001111
111011
DE-EMPH1
RGAIN5
LGAIN5
Table 17. Example ADC Input Gain Settings
5
5
5
DE-EMPH0
RGAIN4
LGAIN4
Decimal Value
4
4
4
+15
+10
-10
-15
+5
-5
0
RGAIN3
LGAIN3
INT1
3
3
3
Volume Setting
RGAIN2
LGAIN2
+15 dB
+10 dB
-10 dB
-15 dB
+5 dB
-5 dB
0 dB
INT0
2
2
2
RGAIN1
LGAIN1
HOLD1
1
1
1
CS42518
RGAIN0
LGAIN0
HOLD0
0
0
0
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