NCP1587EDR2G ON Semiconductor, NCP1587EDR2G Datasheet - Page 6

• Manufacturer Part Number: NCP1587EDR2G
• Description: IC PWM CTLR BUCK UVLO 8-SOIC
• Manufacturer: ON Semiconductor
• Type: Step-Down (Buck)r

Specifications of NCP1587EDR2G

• Internal Switch(s): No
• Synchronous Rectifier: Yes
• Number Of Outputs: 1
• Voltage - Output: Adj to 0.8V
• Current - Output: 1A
• Frequency - Switching: 275kHz
• Voltage - Input: 4.5 V ~ 13.2 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

General
conversion from 5.0 V & 12 V buses. The device has a 1 A
internal gate driver circuit designed to drive N−channel
MOSFETs in a synchronous−rectifier buck topology. The
output voltage of the converter can be precisely regulated
down to 800 mV ±1.0% when the V
The switching frequency, is internally set to 275 kHz. A high
gain operational transconductance error amplifier (OTA) is
used.
Duty Cycle and Maximum Pulse Width Limits
at an operating point defined by the ratio of the input to the
output voltage. The device can achieve an 80% duty cycle.
There is a built in off−time which ensures that the bootstrap
supply is charged every cycle. Both parts can allow a 12 V
to 0.8 V conversion at 275 kHz.
Input Voltage Range (V
13.2 V with respect to GND and PHASE, respectively.
Although BST is rated at 13.2 V with respect to PHASE, it
can also tolerate 26.4 V with respect to GND.
The NCP1587E is a PWM controller intended for DC−DC
In steady state DC operation, the duty cycle will stabilize
The input voltage range for both V
Comp
V
V
BG
TG
V
CC
out
fb
POR
4.2 V
CC
Program
550 mV
50 mV
UVLO
OCP
ming
and BST)
0.9 V
FB
CC
DETAILED OPERATING DESCRIPTION
pin is tied to V
and BST is 4.5 V to
Figure 8. Soft−Start Implementation
SS
http://onsemi.com
OUT
.
6
External Enable/Disable
below the 400 mV threshold, it disables the PWM Logic and
the gate drive outputs. In this disabled mode, the operational
transconductance amplifier (EOTA) output source current is
reduced and limited to the Soft−Start mode of 10 mA.
Normal Shutdown Behavior
because the input supply reaches UVLO threshold. In this
case, switching stops, the internal SS is discharged, and all
GATE pins go low. The switch node enters a high impedance
state and the output capacitors discharge through the load
with no ringing on the output voltage.
External Soft−Start
which reduces inrush current and overshoot of the output
voltage. Soft−start is achieved by using the internal current
source of 10 mA (typ), which charges the external integrator
capacitor of the transconductance amplifier. Figure 8 is a
typical soft−start sequence. This sequence begins once V
surpasses its UVLO threshold and OCP programming is
complete. During soft−start, as the Comp Pin rises through
400 mV, the PWM Logic and gate drives are enabled. When
the feedback voltage crosses 800 mV, the EOTA will be
given control to switch to its higher regulation mode output
current of 120 mA.
NORMAL
When the Comp pin voltage falls or is pulled externally
Normal shutdown occurs when the IC stops switching
The NCP1587E features an external soft−start function,
0.8 V
CC