MC56F8257MLH Freescale Semiconductor, MC56F8257MLH Datasheet - Page 2

• Manufacturer Part Number: MC56F8257MLH
• Description: DSC 64K FLASH 60MHZ 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8257MLH

• Core Processor: 56800E
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x12b, D/A 1x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-LQFP
• Product: DSCs
• Processor Series: 56800E
• Core: 56800E
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 54
• Data Ram Size: 8 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

1
2
3
4
5
6
7
2
MC56F825x/MC56F824x Family Configuration . . . . . . . . . . . .3
Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
2.1
2.2
2.3
2.4
Signal/Connection Descriptions . . . . . . . . . . . . . . . . . . . . . . .11
3.1
3.2
3.3
Memory Maps. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
4.1
4.2
4.3
4.4
4.5
4.6
General System Control Information . . . . . . . . . . . . . . . . . . .36
5.1
5.2
5.3
5.4
5.5
5.6
5.7
5.8
Security Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46
6.1
6.2
6.3
Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48
7.1
7.2
7.3
7.4
7.5
MC56F825x/MC56F824x Features. . . . . . . . . . . . . . . . .4
Award-Winning Development Environment. . . . . . . . . . .8
Architecture Block Diagram. . . . . . . . . . . . . . . . . . . . . . .8
Product Documentation . . . . . . . . . . . . . . . . . . . . . . . .11
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
MC56F825x/MC56F824x Signal Pins . . . . . . . . . . . . . .18
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
Program Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
Data Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
Interrupt Vector Table and Reset Vector . . . . . . . . . . . .33
Peripheral Memory-Mapped Registers . . . . . . . . . . . . .34
EOnCE Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . .35
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36
Power Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36
Reset. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36
On-chip Clock Synthesis . . . . . . . . . . . . . . . . . . . . . . . .37
Interrupt Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
System Integration Module (SIM) . . . . . . . . . . . . . . . . .39
Inter-Module Connections. . . . . . . . . . . . . . . . . . . . . . .40
Joint Test Action Group (JTAG)/Enhanced On-Chip
Emulator (EOnCE) . . . . . . . . . . . . . . . . . . . . . . . . . . . .46
Operation with Security Enabled. . . . . . . . . . . . . . . . . .46
Flash Access Lock and Unlock Mechanisms . . . . . . . .47
Product Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48
General Characteristics . . . . . . . . . . . . . . . . . . . . . . . .48
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . .49
ESD Protection and Latch-up Immunity . . . . . . . . . . . .50
Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . .50
Recommended Operating Conditions . . . . . . . . . . . . . .52
MC56F825x/MC56F824x Digital Signal Controller, Rev. 3
Table of Contents
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9
10 Package Mechanical Outline Drawings . . . . . . . . . . . . . . . . . 76
11 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Appendix A
7.6
7.7
7.8
7.9
7.10 AC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . 56
7.11 Enhanced Flex PWM Characteristics . . . . . . . . . . . . . 57
7.12 Flash Memory Characteristics . . . . . . . . . . . . . . . . . . . 57
7.13 External Clock Operation Timing. . . . . . . . . . . . . . . . . 57
7.14 Phase Locked Loop Timing . . . . . . . . . . . . . . . . . . . . . 58
7.15 External Crystal or Resonator Requirement . . . . . . . . 59
7.16 Relaxation Oscillator Timing . . . . . . . . . . . . . . . . . . . . 59
7.17 Reset, Stop, Wait, Mode Select, and Interrupt Timing. 60
7.18 Queued Serial Peripheral Interface (SPI) Timing . . . . 60
7.19 Queued Serial Communication Interface (SCI) Timing 64
7.20 Freescale’s Scalable Controller Area Network (MSCAN)65
7.21 Inter-Integrated Circuit Interface (I2C) Timing . . . . . . . 65
7.22 JTAG Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
7.23 Quad Timer Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
7.24 COP Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
7.25 Analog-to-Digital Converter (ADC) Parameters. . . . . . 68
7.26 Digital-to-Analog Converter (DAC) Parameters . . . . . . 70
7.27 5-Bit Digital-to-Analog Converter (DAC) Parameters. . 71
7.28 HSCMP Specifications . . . . . . . . . . . . . . . . . . . . . . . . 71
7.29 Optimize Power Consumption . . . . . . . . . . . . . . . . . . . 71
Design Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
8.1
8.2
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
10.1 44-pin LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
10.2 48-pin LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
10.3 64-pin LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Interrupt Vector Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
DC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . 53
Supply Current Characteristics . . . . . . . . . . . . . . . . . . 55
Power-On Reset, Low Voltage Detection Specification 56
Voltage Regulator Specifications . . . . . . . . . . . . . . . . . 56
Thermal Design Considerations . . . . . . . . . . . . . . . . . 72
Electrical Design Considerations. . . . . . . . . . . . . . . . . 73
Freescale Semiconductor