APDS-9700-020 Avago Technologies US Inc., APDS-9700-020 Datasheet
APDS-9700-020
Specifications of APDS-9700-020
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APDS-9700-020 Summary of contents
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... The device is packaged in 8-pin QFN package measuring 0.55mm(H) x 2mm(W) x 2mm(L). Ordering Information Part Number Package APDS-9700-020 Tape & Reel Application Support Information The Application Engineering Group is available to assist you with the application design associated with APDS- 9700 module. You can contact them through your local sales representatives for additional details ...
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Absolute Maximum Ratings (Ta=25°C) Parameter Supply Voltage Input Logic Voltage Reflow Soldering Temperature Recommended Operating Conditions Parameter Operating Temperature Storage Temperature Supply Voltage Electrical & Optical Specifications (Ta=25°C) Parameters Symbol Input Logic High Voltage, LEDON V IH Logic High Voltage, ...
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... V HYS Threshold voltage V TH Sunlight Cancellation DC Current APDS-9700 pin-out and I/O Configurations PIN #1 CORNER Pin 1 Pin 2 Pin 3 Pin 4 Figure 1. APDS-9700 pin-out and I/O Configurations 3 Minimum Typical Maximum Units Conditions 655 100 I/O Pins Configuration Table Pin Symbol 1 LEDON ...
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... Application Circuit for APDS-9700 VIO R2 LEDON PWM/ GPIO GPIO MCU GPIO ADC Figure 2. Typical Application Circuit for APDS-9700 Recommended Avago Proximity Sensor HSDL-9100 Component CX1 CX2 CX3 4 Vcc 1 8 ENB LEDA 2 7 APDS-9700 DOUT PFILT 3 6 GND Description Integrated Reflective Proximity Sensor Recommended Values ( with HSDL-9100) 10 Ω ...
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... APDS-9700 Block Diagram (1) LEDON (3) DOUT Hysteresis Comparator Figure 3. APDS-9700 Block Diagram 5 (7) LEDA Stuck High Protection Sunlight Cancellation (5) PD TIA PIN (6) PFILT V-I CONVERTER (2) ENB (4) DOUT R1 Avago Proximity Sensor LED CX3 R3 ...
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... APDS-9700 Typical Timing Waveforms Vcc ENB >50ns LEDON PFLIT DOUT Note: Pulses at LEDON can only be activated at least 20us after ENB turn from high to low. Figure 4. APDS-9700 Typical Timing Waveforms 6 Burst Pulses >20μ ...
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... APDS-9700 Performance Charts (Typical Conditions) 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 2.4 2.6 2.8 3 VCC (V) q Figure 5. Normalized ILED Vs Vcc (T=25 C, R1=10 1.1 1.05 1 0.95 0.9 2.4 2.6 2.8 3 VCC(V) q Figure 7. Normalized ICC Idle Vs Vcc (T=25 C) 1.2 1.15 1.1 1. ...
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... APDS-9700 Package Dimensions Pin # Top TOP VIEW SIDE VIEW 1.20 0. 0.125 (x4) 0.25 (x8) 0.25 (x6) BOTTOM VIEW Dimensions in mm. Tolerance ±0.1mm Figure 11. Package Outline Dimensions and land patterm 8 5 Marking Information The unit is marked ‘YWW LL’ on the chip Year (Last digit of the year) ...
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... LLa UNIT ORIENTATION IN POCKET 5° MAX 2.30 ± 0.10 A. Figure 13. APDS-9700 Tape Dimensions 9 Keep-out Area Recommendations: 1. Area of Solder Land pattern = 2.3mm x 2.1mm 2. Module placement tolerance & keep out on each side with no lead = 0.55mm & keep out on each side solder lead = 0.8mm 3 ...
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... EMBOSSED RIBS RAISED 0.25mm WIDTH 1.25mm BACK VIEW Figure 14. Reel Dimension Drawing APDS-9700 Packaging All APDS-9700 options are shipped in ESD proof package. This part is compliant to JEDEC MSL1. 10 XXX-REPRESENTS SUPPLIERS’S LOGO OR NAME (OPTION) TEXT HEIGHT: 6.25mm HIGH X 1.6mm WIDE (EMBOSSED LETTERS) SEE DETAIL “ ...
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... The temperatures are measured at the component to printed circuit board con- nections. In process zone P1, the PC board and APDS-9700 pins are heated to a temperature of 150°C to activate the flux in the solder paste. The temperature ramp up rate, R1, is lim- ited to 3° ...